MCAN init fail on arm/samV71 bsp in RTEMS 5.3

[Dario]

Hi expert,

I have found some problems on MCAN module configuration running on SAM V71 XPLAINED ULTRA EVALUATION KIT.

It is not possible choice other input clock reference (excluded PMC_PCK_CSS_MCK), the default configuration works only on 500kb/s and MCANx_PROP_SEGy, MCANx_PROP_SEG and MCANx_SYNC_JUMP parameters not are compatibles with several MCAN bit time calculators suggested from Microchip, (is it possible have the MCAN calculator that you have used to calculate yours parameters?):

​https://www.kvaser.com/support/calculators/bit-timing-calculator/
​https://intrepidcs.com/products/free-tools/mb-time-calculator/

PS: I have found the following register description error (the samV71 datasheet used is DS60001527H)

#define MCAN_FBTP_FSJW_Msk (0x7u << MCAN_FBTP_FSJW_Pos)
#define MCAN_FBTP_FTSEG2_Msk (0xfu << MCAN_FBTP_FTSEG2_Pos)
#define MCAN_FBTP_FTSEG1_Msk (0x1fu << MCAN_FBTP_FTSEG1_Pos)

And our collaborators has found also:

#define MCAN_BTP_SJW_Pos 25
#define MCAN_BTP_SJW_Msk (0x7fu << MCAN_BTP_SJW_Pos)

#define MCAN_BTP_TSEG2_Pos 0
#define MCAN_BTP_TSEG2_Msk (0x7fu << MCAN_BTP_TSEG2_Pos)

#define MCAN_BTP_TSEG1_Pos 8
#define MCAN_BTP_TSEG1_Msk (0xffu << MCAN_BTP_TSEG1_Pos)

#define MCAN_BTP_BRP_Msk (0x1ffu << MCAN_BTP_BRP_Pos)

I hope the description is clear enought.

Best regards,
Dario

[Joel Sherrill]

Since you have the hardware, have identified the bug, and apparently have a fix, it would be greatly appreciated if you could post a patch. The community will be happy to help you with this if you need help doing that.

[Dario]

Hi,

you can close the ticket. See the attach. The patches are done by hand made.

Regards,
Dario

[Dario]

Attached file patchs 1Mb/s speed configuration, register mapping wrong and problem with data cache in multiframe.