Opened on 02/17/12 at 22:08:27
Closed on 03/30/12 at 14:17:02
#2023 closed defect (fixed)
A generic BSP for the Xilinx Virtex 5 (PPC 440)
Reported by: | Ric Claus | Owned by: | Sebastian Huber |
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Priority: | normal | Milestone: | 4.11 |
Component: | bsps | Version: | 4.10 |
Severity: | normal | Keywords: | |
Cc: | joel.sherrill@…, sebastian.huber@…, claus@… | Blocked By: | |
Blocking: |
Description
Like the Virtex 4 BSP previously submitted, this BSP makes no assumptions on what firmware is loaded into the FPGA.
Attachments (3)
Change History (7)
Changed on 02/17/12 at 22:09:18 by Ric Claus
Attachment: | 0006-Virtex-5-BSP.patch added |
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Changed on 02/17/12 at 22:09:47 by Ric Claus
Attachment: | 0007-Virtex-5-BSP.patch added |
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Patch to get rid of the aforementioned irrelevant files
comment:1 Changed on 02/18/12 at 17:24:25 by Ric Claus
Cc: | Ric Claus added |
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comment:2 Changed on 02/20/12 at 07:12:36 by Sebastian Huber
Cc: | Sebastian Huber added |
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dependson: | → 2020 |
Owner: | changed from Joel Sherrill to Sebastian Huber |
comment:3 Changed on 02/21/12 at 18:07:59 by Joel Sherrill
Cc: | Joel Sherrill added |
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Changed on 03/02/12 at 01:01:09 by Ric Claus
Attachment: | 0014-Fixes-updates-and-improvements-to-virtex5-BSP.patch added |
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Various fixes to the virtex5 BSP
comment:4 Changed on 03/30/12 at 14:17:02 by Joel Sherrill
Resolution: | → fixed |
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Status: | new → closed |
Merged onto upstream master
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Basic patch that unfortunately includes some irrelevant files