Ticket #2023: 0006-Virtex-5-BSP.patch
File 0006-Virtex-5-BSP.patch, 62.3 KB (added by Ric Claus, on 02/17/12 at 22:09:18) |
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new file c/src/lib/libbsp/powerpc/virtex5/ChangeLog
From 801715dd0b969ca878d5175b9ccbb4296ca3c381 Mon Sep 17 00:00:00 2001 From: Ric Claus <claus@SLAC.Stanford.edu> Date: Fri, 17 Feb 2012 14:00:24 -0800 Subject: [PATCH 6/7] Virtex 5 BSP --- c/src/lib/libbsp/powerpc/virtex5/ChangeLog | 3 + c/src/lib/libbsp/powerpc/virtex5/Makefile.am | 69 +++ c/src/lib/libbsp/powerpc/virtex5/bsp_specs | 16 + c/src/lib/libbsp/powerpc/virtex5/configure.ac | 40 ++ c/src/lib/libbsp/powerpc/virtex5/include/bsp.h | 75 ++++ .../libbsp/powerpc/virtex5/include/bspopts.h.in~ | 40 ++ c/src/lib/libbsp/powerpc/virtex5/include/coverhd.h | 133 ++++++ c/src/lib/libbsp/powerpc/virtex5/include/irq.h | 10 + .../libbsp/powerpc/virtex5/make/custom/virtex5.cfg | 19 + c/src/lib/libbsp/powerpc/virtex5/preinstall.am | 75 ++++ .../lib/libbsp/powerpc/virtex5/startup/bspclean.c | 43 ++ .../lib/libbsp/powerpc/virtex5/startup/bspstart.c | 221 ++++++++++ .../libbsp/powerpc/virtex5/startup/dummy_console.c | 68 +++ c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds | 264 ++++++++++++ c/src/lib/libbsp/powerpc/virtex5/startup/start.S | 454 ++++++++++++++++++++ 15 files changed, 1530 insertions(+), 0 deletions(-) create mode 100644 c/src/lib/libbsp/powerpc/virtex5/ChangeLog create mode 100644 c/src/lib/libbsp/powerpc/virtex5/Makefile.am create mode 100644 c/src/lib/libbsp/powerpc/virtex5/bsp_specs create mode 100644 c/src/lib/libbsp/powerpc/virtex5/configure.ac create mode 100644 c/src/lib/libbsp/powerpc/virtex5/include/bsp.h create mode 100644 c/src/lib/libbsp/powerpc/virtex5/include/bspopts.h.in~ create mode 100644 c/src/lib/libbsp/powerpc/virtex5/include/coverhd.h create mode 100644 c/src/lib/libbsp/powerpc/virtex5/include/irq.h create mode 100644 c/src/lib/libbsp/powerpc/virtex5/make/custom/virtex5.cfg create mode 100644 c/src/lib/libbsp/powerpc/virtex5/preinstall.am create mode 100644 c/src/lib/libbsp/powerpc/virtex5/startup/bspclean.c create mode 100644 c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c create mode 100644 c/src/lib/libbsp/powerpc/virtex5/startup/dummy_console.c create mode 100644 c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds create mode 100644 c/src/lib/libbsp/powerpc/virtex5/startup/start.S diff --git a/c/src/lib/libbsp/powerpc/virtex5/ChangeLog b/c/src/lib/libbsp/powerpc/virtex5/ChangeLog new file mode 100644 index 0000000..a330e93
- + 1 2011-03-4 Ric Claus <claus@slac.stanford.edu> 2 3 * ChangeLog, virtex5.cfg: added files. -
new file c/src/lib/libbsp/powerpc/virtex5/Makefile.am
diff --git a/c/src/lib/libbsp/powerpc/virtex5/Makefile.am b/c/src/lib/libbsp/powerpc/virtex5/Makefile.am new file mode 100644 index 0000000..0e47953
- + 1 ## 2 ## $Id: $ 3 ## 4 5 ACLOCAL_AMFLAGS = -I ../../../../aclocal 6 7 include $(top_srcdir)/../../../../automake/compile.am 8 9 include_bspdir = $(includedir)/bsp 10 11 dist_project_lib_DATA = bsp_specs 12 13 # include 14 include_HEADERS = include/bsp.h 15 #include_HEADERS += include/tm27.h 16 17 nodist_include_HEADERS = include/bspopts.h 18 nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h 19 DISTCLEANFILES = include/bspopts.h 20 21 nodist_include_HEADERS += include/coverhd.h 22 23 # start 24 noinst_LIBRARIES = libbspstart.a 25 libbspstart_a_SOURCES = ../../powerpc/shared/start/rtems_crti.S 26 project_lib_DATA = rtems_crti.$(OBJEXT) 27 28 dist_project_lib_DATA += startup/linkcmds 29 30 noinst_LIBRARIES += libbsp.a 31 32 # startup 33 libbsp_a_SOURCES = startup/bspclean.c \ 34 ../shared/startup/zerobss.c \ 35 ../../shared/bsplibc.c \ 36 ../../shared/bspgetworkarea.c \ 37 ../../shared/bsppost.c \ 38 startup/bspstart.c \ 39 ../../shared/bootcard.c \ 40 ../../shared/sbrk.c \ 41 ../../shared/gnatinstallhandler.c 42 43 # start 44 libbsp_a_SOURCES += startup/start.S 45 46 # clock 47 libbsp_a_SOURCES += ../shared/clock/clock.c 48 49 # console 50 libbsp_a_SOURCES += startup/dummy_console.c \ 51 ../../shared/dummy_printk_support.c 52 53 # irq 54 include_bsp_HEADERS = include/irq.h 55 56 #vectors 57 include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h 58 include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h 59 60 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ 61 ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \ 62 ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \ 63 ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \ 64 ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel 65 66 EXTRA_DIST = 67 68 include $(srcdir)/preinstall.am 69 include $(top_srcdir)/../../../../automake/local.am -
new file c/src/lib/libbsp/powerpc/virtex5/bsp_specs
diff --git a/c/src/lib/libbsp/powerpc/virtex5/bsp_specs b/c/src/lib/libbsp/powerpc/virtex5/bsp_specs new file mode 100644 index 0000000..98864c9
- + 1 %rename startfile old_startfile 2 %rename link old_link 3 %rename endfile old_endfile 4 5 6 *startfile: 7 %{!qrtems: %(old_startfile)} \ 8 %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s }} 9 10 *link: 11 %{!qrtems: %(old_link)} \ 12 %{qrtems: -dc -dp -Bstatic -u __vectors -u download_entry -N } 13 14 *endfile: 15 %{!qrtems: %(old_endfile)} \ 16 %{qrtems: crtend.o%s ecrtn.o%s} -
new file c/src/lib/libbsp/powerpc/virtex5/configure.ac
diff --git a/c/src/lib/libbsp/powerpc/virtex5/configure.ac b/c/src/lib/libbsp/powerpc/virtex5/configure.ac new file mode 100644 index 0000000..85a4cbc
- + 1 dnl Process this file with autoconf to produce a configure script. 2 dnl 3 dnl $Id: $ 4 5 AC_PREREQ(2.68) 6 AC_INIT([rtems-c-src-lib-libbsp-powerpc-virtex5],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) 7 AC_CONFIG_SRCDIR([bsp_specs]) 8 RTEMS_TOP(../../../../../..) 9 10 RTEMS_CANONICAL_TARGET_CPU 11 AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1]) 12 RTEMS_BSP_CONFIGURE 13 14 RTEMS_PROG_CC_FOR_TARGET 15 RTEMS_CANONICALIZE_TOOLS 16 RTEMS_PROG_CCAS 17 18 RTEMS_CHECK_NETWORKING 19 20 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") 21 22 RTEMS_BSPOPTS_SET([PPC_USE_SPRG],[*],[1]) 23 RTEMS_BSPOPTS_HELP([PPC_USE_SPRG], 24 [If defined, then the PowerPC specific code in RTEMS will use some 25 of the special purpose registers to slightly optimize interrupt 26 response time. The use of these registers can conflict with 27 other tools like debuggers.]) 28 29 RTEMS_BSPOPTS_SET([PPC_VECTOR_FILE_BASE],[*],[0x0100]) 30 RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE], 31 [This defines the base address of the exception table.]) 32 33 RTEMS_BSP_CLEANUP_OPTIONS(0, 1) 34 35 # Explicitly list all Makefiles here 36 AC_CONFIG_FILES([Makefile]) 37 38 RTEMS_PPC_EXCEPTIONS 39 40 AC_OUTPUT -
new file c/src/lib/libbsp/powerpc/virtex5/include/bsp.h
diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/bsp.h b/c/src/lib/libbsp/powerpc/virtex5/include/bsp.h new file mode 100644 index 0000000..3580b3c
- + 1 /* bsp.h 2 * 3 * This include file contains all GEN405 board IO definitions. 4 * 5 * derived from helas403/include/bsp.h: 6 * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp 7 * Author: Thomas Doerfler <td@imd.m.isar.de> 8 * IMD Ingenieurbuero fuer Microcomputertechnik 9 * 10 * COPYRIGHT (c) 1998 by IMD 11 * 12 * Changes from IMD are covered by the original distributions terms. 13 * This file has been derived from the papyrus BSP. 14 * 15 * Author: Andrew Bray <andy@i-cubed.co.uk> 16 * 17 * COPYRIGHT (c) 1995 by i-cubed ltd. 18 * 19 * To anyone who acknowledges that this file is provided "AS IS" 20 * without any express or implied warranty: 21 * permission to use, copy, modify, and distribute this file 22 * for any purpose is hereby granted without fee, provided that 23 * the above copyright notice and this notice appears in all 24 * copies, and that the name of i-cubed limited not be used in 25 * advertising or publicity pertaining to distribution of the 26 * software without specific, written prior permission. 27 * i-cubed limited makes no representations about the suitability 28 * of this software for any purpose. 29 * 30 * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h 31 * 32 * COPYRIGHT (c) 1989-1999. 33 * On-Line Applications Research Corporation (OAR). 34 * 35 * The license and distribution terms for this file may be 36 * found in the file LICENSE in this distribution or at 37 * http://www.rtems.com/license/LICENSE. 38 * 39 * $Id: bsp.h 63 2011-04-26 00:23:51Z claus $ 40 * 41 */ 42 43 #ifndef _BSP_H 44 #define _BSP_H 45 46 #ifdef __cplusplus 47 extern "C" { 48 #endif 49 50 #include <bspopts.h> 51 52 /* 53 * confdefs.h overrides for this BSP: 54 * - Interrupt stack space is not minimum if defined. 55 */ 56 57 #define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) 58 59 #ifdef ASM 60 /* Definition of where to store registers in alignment handler */ 61 #define ALIGN_REGS 0x0140 62 63 #else 64 #include <rtems.h> 65 #include <rtems/console.h> 66 #include <rtems/clockdrv.h> 67 #include <rtems/iosupp.h> 68 69 #endif /* ASM */ 70 71 #ifdef __cplusplus 72 } 73 #endif 74 75 #endif -
new file c/src/lib/libbsp/powerpc/virtex5/include/bspopts.h.in~
diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/bspopts.h.in~ b/c/src/lib/libbsp/powerpc/virtex5/include/bspopts.h.in~ new file mode 100644 index 0000000..203dde9
- + 1 /* include/bspopts.h.in. Generated from configure.ac by autoheader. */ 2 3 /* If defined, then the BSP Framework will put a non-zero pattern into the 4 RTEMS Workspace and C program heap. This should assist in finding code that 5 assumes memory starts set to zero. */ 6 #undef BSP_DIRTY_MEMORY 7 8 /* If defined, print a message and wait until pressed before resetting board 9 when application exits. */ 10 #undef BSP_PRESS_KEY_FOR_RESET 11 12 /* If defined, reset the board when the application exits. */ 13 #undef BSP_RESET_BOARD_AT_EXIT 14 15 /* Define to the address where bug reports for this package should be sent. */ 16 #undef PACKAGE_BUGREPORT 17 18 /* Define to the full name of this package. */ 19 #undef PACKAGE_NAME 20 21 /* Define to the full name and version of this package. */ 22 #undef PACKAGE_STRING 23 24 /* Define to the one symbol short name of this package. */ 25 #undef PACKAGE_TARNAME 26 27 /* Define to the home page for this package. */ 28 #undef PACKAGE_URL 29 30 /* Define to the version of this package. */ 31 #undef PACKAGE_VERSION 32 33 /* If defined, then the PowerPC specific code in RTEMS will use some of the 34 special purpose registers to slightly optimize interrupt response time. The 35 use of these registers can conflict with other tools like debuggers. */ 36 #undef PPC_USE_SPRG 37 38 /* This defines the base address of the exception table. NOTE: Vectors are 39 actually at 0xFFF00000 but file starts at offset. */ 40 #undef PPC_VECTOR_FILE_BASE -
new file c/src/lib/libbsp/powerpc/virtex5/include/coverhd.h
diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/coverhd.h b/c/src/lib/libbsp/powerpc/virtex5/include/coverhd.h new file mode 100644 index 0000000..50d9606
- + 1 /* coverhd.h 2 * 3 * This include file has defines to represent the overhead associated 4 * with calling a particular directive from C. These are used in the 5 * Timing Test Suite to ignore the overhead required to pass arguments 6 * to directives. On some CPUs and/or target boards, this overhead 7 * is significant and makes it difficult to distinguish internal 8 * RTEMS execution time from that used to call the directive. 9 * This file should be updated after running the C overhead timing 10 * test. Once this update has been performed, the RTEMS Time Test 11 * Suite should be rebuilt to account for these overhead times in the 12 * timing results. 13 * 14 * NOTE: If these are all zero, then the times reported include 15 * all calling overhead including passing of arguments. 16 * 17 * COPYRIGHT (c) 1989-1999. 18 * On-Line Applications Research Corporation (OAR). 19 * 20 * The license and distribution terms for this file may be 21 * found in the file LICENSE in this distribution or at 22 * http://www.rtems.com/license/LICENSE. 23 * 24 * $Id: coverhd.h 63 2011-04-26 00:23:51Z claus $ 25 */ 26 27 /* 28 * Updated for a 25MHz Papyrus by Andrew Bray <andy@i-cubed.co.uk> 29 * 30 * Units are 100ns. 31 * 32 * These numbers are of questionable use, as they are developed by calling 33 * the routine many times, thus getting its entry veneer into the (small) 34 * cache on the 403GA. This in general is not true of the RTEMS timing 35 * tests, which usually call a routine only once, thus having no cache loaded 36 * advantage. 37 * 38 * Whether the directive times are useful after deducting the function call 39 * overhead is also questionable. The user is more interested generally 40 * in the total cost of a directive, not the cost if the procedure call 41 * is inlined! (In general this is not true). 42 * 43 * Andrew Bray 18/08/1995 44 * 45 */ 46 47 #ifndef __COVERHD_h 48 #define __COVERHD_h 49 50 #ifdef __cplusplus 51 extern "C" { 52 #endif 53 54 #define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 1 55 #define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 1 56 #define CALLING_OVERHEAD_TASK_CREATE 3 57 #define CALLING_OVERHEAD_TASK_IDENT 1 58 #define CALLING_OVERHEAD_TASK_START 1 59 #define CALLING_OVERHEAD_TASK_RESTART 1 60 #define CALLING_OVERHEAD_TASK_DELETE 1 61 #define CALLING_OVERHEAD_TASK_SUSPEND 1 62 #define CALLING_OVERHEAD_TASK_RESUME 1 63 #define CALLING_OVERHEAD_TASK_SET_PRIORITY 1 64 #define CALLING_OVERHEAD_TASK_MODE 1 65 #define CALLING_OVERHEAD_TASK_GET_NOTE 1 66 #define CALLING_OVERHEAD_TASK_SET_NOTE 1 67 #define CALLING_OVERHEAD_TASK_WAKE_WHEN 4 68 #define CALLING_OVERHEAD_TASK_WAKE_AFTER 1 69 #define CALLING_OVERHEAD_INTERRUPT_CATCH 1 70 #define CALLING_OVERHEAD_CLOCK_GET 4 71 #define CALLING_OVERHEAD_CLOCK_SET 3 72 #define CALLING_OVERHEAD_CLOCK_TICK 1 73 74 #define CALLING_OVERHEAD_TIMER_CREATE 1 75 #define CALLING_OVERHEAD_TIMER_IDENT 1 76 #define CALLING_OVERHEAD_TIMER_DELETE 1 77 #define CALLING_OVERHEAD_TIMER_FIRE_AFTER 2 78 #define CALLING_OVERHEAD_TIMER_FIRE_WHEN 5 79 #define CALLING_OVERHEAD_TIMER_RESET 1 80 #define CALLING_OVERHEAD_TIMER_CANCEL 1 81 #define CALLING_OVERHEAD_SEMAPHORE_CREATE 2 82 #define CALLING_OVERHEAD_SEMAPHORE_IDENT 1 83 #define CALLING_OVERHEAD_SEMAPHORE_DELETE 1 84 #define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 1 85 #define CALLING_OVERHEAD_SEMAPHORE_RELEASE 1 86 #define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 2 87 #define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 1 88 #define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 1 89 #define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 1 90 #define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 1 91 #define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 1 92 #define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 2 93 #define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 1 94 95 #define CALLING_OVERHEAD_EVENT_SEND 1 96 #define CALLING_OVERHEAD_EVENT_RECEIVE 2 97 #define CALLING_OVERHEAD_SIGNAL_CATCH 1 98 #define CALLING_OVERHEAD_SIGNAL_SEND 1 99 #define CALLING_OVERHEAD_PARTITION_CREATE 3 100 #define CALLING_OVERHEAD_PARTITION_IDENT 1 101 #define CALLING_OVERHEAD_PARTITION_DELETE 1 102 #define CALLING_OVERHEAD_PARTITION_GET_BUFFER 1 103 #define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 1 104 #define CALLING_OVERHEAD_REGION_CREATE 3 105 #define CALLING_OVERHEAD_REGION_IDENT 1 106 #define CALLING_OVERHEAD_REGION_DELETE 1 107 #define CALLING_OVERHEAD_REGION_GET_SEGMENT 2 108 #define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 1 109 #define CALLING_OVERHEAD_PORT_CREATE 2 110 #define CALLING_OVERHEAD_PORT_IDENT 1 111 #define CALLING_OVERHEAD_PORT_DELETE 1 112 #define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 1 113 #define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2 114 115 #define CALLING_OVERHEAD_IO_INITIALIZE 2 116 #define CALLING_OVERHEAD_IO_OPEN 2 117 #define CALLING_OVERHEAD_IO_CLOSE 2 118 #define CALLING_OVERHEAD_IO_READ 2 119 #define CALLING_OVERHEAD_IO_WRITE 2 120 #define CALLING_OVERHEAD_IO_CONTROL 2 121 #define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 1 122 #define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 1 123 #define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 1 124 #define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 1 125 #define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 1 126 #define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 1 127 #define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 1 128 129 #ifdef __cplusplus 130 } 131 #endif 132 133 #endif -
new file c/src/lib/libbsp/powerpc/virtex5/include/irq.h
diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/irq.h b/c/src/lib/libbsp/powerpc/virtex5/include/irq.h new file mode 100644 index 0000000..29feb3f
- + 1 #ifndef VIRTEX5_RTEMSBSP_IRQ_H 2 #define VIRTEX5_RTEMSBSP_IRQ_H 3 4 #warning "virtex5 BSP's <bsp/irq.h> is BOGUS; this BSP implements no interrupt handling. This header exists to get everything to compile." 5 6 #define BSP_SHARED_HANDLER_SUPPORT 1 7 8 #include <rtems/irq.h> 9 10 #endif -
new file c/src/lib/libbsp/powerpc/virtex5/make/custom/virtex5.cfg
diff --git a/c/src/lib/libbsp/powerpc/virtex5/make/custom/virtex5.cfg b/c/src/lib/libbsp/powerpc/virtex5/make/custom/virtex5.cfg new file mode 100644 index 0000000..b4a7bd3
- + 1 include $(RTEMS_ROOT)/make/custom/default.cfg 2 3 RTEMS_CPU=powerpc 4 RTEMS_CPU_MODEL=ppc440 5 6 # This contains the compiler options necessary to select the CPU model 7 # and (hopefully) optimize for it. 8 # 9 CPU_CFLAGS = -mcpu=440 -Dppc440 -msoft-float 10 11 # optimize flag: typically -O2 12 CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions 13 14 # Miscellaneous additions go here 15 define bsp-post-link 16 $(default-bsp-post-link) 17 $(OBJCOPY) -O srec $(basename $@).exe $(basename $@)$(DOWNEXT) 18 endef 19 -
new file c/src/lib/libbsp/powerpc/virtex5/preinstall.am
diff --git a/c/src/lib/libbsp/powerpc/virtex5/preinstall.am b/c/src/lib/libbsp/powerpc/virtex5/preinstall.am new file mode 100644 index 0000000..e945d2b
- + 1 ## Automatically generated by ampolish3 - Do not edit 2 3 if AMPOLISH3 4 $(srcdir)/preinstall.am: Makefile.am 5 $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am 6 endif 7 8 PREINSTALL_DIRS = 9 DISTCLEANFILES += $(PREINSTALL_DIRS) 10 11 all-local: $(TMPINSTALL_FILES) 12 13 TMPINSTALL_FILES = 14 CLEANFILES = $(TMPINSTALL_FILES) 15 16 all-am: $(PREINSTALL_FILES) 17 18 PREINSTALL_FILES = 19 CLEANFILES += $(PREINSTALL_FILES) 20 21 $(PROJECT_LIB)/$(dirstamp): 22 @$(MKDIR_P) $(PROJECT_LIB) 23 @: > $(PROJECT_LIB)/$(dirstamp) 24 PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) 25 26 $(PROJECT_INCLUDE)/$(dirstamp): 27 @$(MKDIR_P) $(PROJECT_INCLUDE) 28 @: > $(PROJECT_INCLUDE)/$(dirstamp) 29 PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) 30 31 $(PROJECT_INCLUDE)/bsp/$(dirstamp): 32 @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp 33 @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) 34 PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) 35 36 $(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) 37 $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs 38 PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs 39 40 $(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) 41 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h 42 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h 43 44 $(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) 45 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h 46 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h 47 48 $(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 49 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h 50 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h 51 52 $(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp) 53 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h 54 PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h 55 56 $(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) 57 $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) 58 TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) 59 60 $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) 61 $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds 62 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds 63 64 $(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 65 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h 66 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h 67 68 $(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 69 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h 70 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h 71 72 $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 73 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h 74 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h 75 -
new file c/src/lib/libbsp/powerpc/virtex5/startup/bspclean.c
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/bspclean.c b/c/src/lib/libbsp/powerpc/virtex5/startup/bspclean.c new file mode 100644 index 0000000..c80c1b1
- + 1 /* bsp_cleanup() 2 * 3 * This routine normally is part of start.s and usually returns 4 * control to a monitor. 5 * 6 * INPUT: NONE 7 * 8 * OUTPUT: NONE 9 * 10 * Author: Andrew Bray <andy@i-cubed.co.uk> 11 * 12 * COPYRIGHT (c) 1995 by i-cubed ltd. 13 * 14 * To anyone who acknowledges that this file is provided "AS IS" 15 * without any express or implied warranty: 16 * permission to use, copy, modify, and distribute this file 17 * for any purpose is hereby granted without fee, provided that 18 * the above copyright notice and this notice appears in all 19 * copies, and that the name of i-cubed limited not be used in 20 * advertising or publicity pertaining to distribution of the 21 * software without specific, written prior permission. 22 * i-cubed limited makes no representations about the suitability 23 * of this software for any purpose. 24 * 25 * Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspclean.c: 26 * 27 * COPYRIGHT (c) 1989-1999. 28 * On-Line Applications Research Corporation (OAR). 29 * 30 * The license and distribution terms for this file may be 31 * found in the file LICENSE in this distribution or at 32 * http://www.rtems.com/license/LICENSE. 33 * 34 * $Id: bspclean.c 63 2011-04-26 00:23:51Z claus $ 35 */ 36 37 #include <rtems.h> 38 #include <bsp.h> 39 40 void bsp_cleanup( void ) 41 { 42 /* rtems_fatal_error_occurred(0); */ 43 } -
new file c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c b/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c new file mode 100644 index 0000000..02ebfad
- + 1 /* bsp_start() 2 * 3 * This routine starts the application. It includes application, 4 * board, and monitor specific initialization and configuration. 5 * The generic CPU dependent initialization has been performed 6 * before this routine is invoked. 7 * 8 * INPUT: NONE 9 * 10 * OUTPUT: NONE 11 * 12 * Author: Thomas Doerfler <td@imd.m.isar.de> 13 * IMD Ingenieurbuero fuer Microcomputertechnik 14 * 15 * COPYRIGHT (c) 1998 by IMD 16 * 17 * Changes from IMD are covered by the original distributions terms. 18 * This file has been derived from the papyrus BSP: 19 * 20 * Author: Andrew Bray <andy@i-cubed.co.uk> 21 * 22 * COPYRIGHT (c) 1995 by i-cubed ltd. 23 * 24 * To anyone who acknowledges that this file is provided "AS IS" 25 * without any express or implied warranty: 26 * permission to use, copy, modify, and distribute this file 27 * for any purpose is hereby granted without fee, provided that 28 * the above copyright notice and this notice appears in all 29 * copies, and that the name of i-cubed limited not be used in 30 * advertising or publicity pertaining to distribution of the 31 * software without specific, written prior permission. 32 * i-cubed limited makes no representations about the suitability 33 * of this software for any purpose. 34 * 35 * Modifications for spooling console driver and control of memory layout 36 * with linker command file by 37 * Thomas Doerfler <td@imd.m.isar.de> 38 * for these modifications: 39 * COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. 40 * 41 * To anyone who acknowledges that this file is provided "AS IS" 42 * without any express or implied warranty: 43 * permission to use, copy, modify, and distribute this file 44 * for any purpose is hereby granted without fee, provided that 45 * the above copyright notice and this notice appears in all 46 * copies. IMD makes no representations about the suitability 47 * of this software for any purpose. 48 * 49 * Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c: 50 * 51 * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. 52 * On-Line Applications Research Corporation (OAR). 53 * 54 * Modifications for PPC405GP by Dennis Ehlin 55 * Modifications for Virtex5 by Richard Claus <claus@slac.stanford.edu> 56 * 57 * $Id: bspstart.c 63 2011-04-26 00:23:51Z claus $ 58 */ 59 60 #include <string.h> 61 #include <fcntl.h> 62 63 #include <bsp.h> 64 #include <rtems/libio.h> 65 #include <rtems/libcsupport.h> 66 #include <rtems/bspIo.h> 67 #include <bsp/vectors.h> 68 #include <libcpu/spr.h> 69 #include <libcpu/cpuIdent.h> 70 71 #define DO_DOWN_ALIGN(x,a) ((x) & ~((a)-1)) 72 73 #define DO_UP_ALIGN(x,a) DO_DOWN_ALIGN(((x) + (a) - 1 ),a) 74 75 #define CPU_DOWN_ALIGN(x) DO_DOWN_ALIGN(x, CPU_ALIGNMENT) 76 #define CPU_UP_ALIGN(x) DO_UP_ALIGN(x, CPU_ALIGNMENT) 77 78 79 /* Expected by clock.c */ 80 uint32_t bsp_clicks_per_usec; 81 bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */ 82 uint32_t bsp_timer_least_valid; 83 uint32_t bsp_timer_average_overhead; 84 85 86 /* Provide weak aliases so that RTEMS distribution builds; the 87 * generated executables are bogus, however... 88 */ 89 void __app_noopfun(void) {} 90 91 void app_memory_write(void) /* See dummy_console.c */ 92 __attribute__(( weak, alias("__app_noopfun") )); 93 94 void app_bsp_start(void) 95 __attribute__(( weak, alias("__app_noopfun") )); 96 97 void app_bsp_pretasking_hook(void) 98 __attribute__(( weak, alias("__app_noopfun") )); 99 100 void app_bsp_predriver_hook(void) 101 __attribute__(( weak, alias("__app_noopfun") )); 102 103 104 LINKER_SYMBOL(__bsp_ram_start); 105 LINKER_SYMBOL(__bsp_ram_end); 106 LINKER_SYMBOL(WorkAreaBase); 107 LINKER_SYMBOL(MsgAreaBase); 108 LINKER_SYMBOL(MsgAreaSize); 109 110 static char* bspMsgBuffer = (char*)MsgAreaBase; 111 112 static void __bsp_outchar_to_memory(char c) 113 { 114 static char* msgBuffer = (char*)MsgAreaBase; 115 *msgBuffer++ = c; 116 if (msgBuffer >= &bspMsgBuffer[(int)MsgAreaSize]) msgBuffer = bspMsgBuffer; 117 *msgBuffer = 0x00; /* Overwrite next location to show EOM */ 118 } 119 120 121 void BSP_ask_for_reset(void) 122 { 123 printk("\nSystem stopped, press RESET"); 124 for(;;); 125 /*__asm__ __volatile ("sc");*/ 126 } 127 128 129 void BSP_panic(char *s) 130 { 131 printk("\n%s PANIC %s\n", _RTEMS_version, s); 132 BSP_ask_for_reset(); 133 } 134 135 136 void _BSP_Fatal_error(unsigned int v) 137 { 138 printk("\n%s FATAL ERROR %x\n", _RTEMS_version, v); 139 BSP_ask_for_reset(); 140 } 141 142 143 /*===================================================================*/ 144 145 /* 146 * BSP start routine. Called by boot_card(). 147 * 148 * This routine does the bulk of the system initialization. 149 */ 150 void bsp_start(void) 151 { 152 rtems_status_code sc = RTEMS_SUCCESSFUL; 153 uintptr_t intrStackStart; 154 uintptr_t intrStackSize; 155 ppc_cpu_id_t myCpu; 156 ppc_cpu_revision_t myCpuRevision; 157 158 /* Set the character output function; The application may override this */ 159 BSP_output_char = __bsp_outchar_to_memory; 160 161 /* 162 * Get CPU identification dynamically. Note that the get_ppc_cpu_type() 163 * function stores the result in global variables 164 * so that it can be used later... 165 */ 166 myCpu = get_ppc_cpu_type(); 167 myCpuRevision = get_ppc_cpu_revision(); 168 printk("CPU: 0x%04x, Revision: 0x%04x = %d, Name: %s\n", 169 myCpu, myCpuRevision, myCpuRevision, get_ppc_cpu_type_name(myCpu)); 170 171 /* 172 * Initialize the device driver parameters 173 */ 174 175 /* Timebase register ticks/microsecond; The application may override these */ 176 bsp_clicks_per_usec = 450; 177 bsp_timer_internal_clock = true; 178 bsp_timer_average_overhead = 2; 179 bsp_timer_least_valid = 3; 180 181 /* 182 * Initialize the interrupt related settings. 183 */ 184 intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start); 185 intrStackSize = rtems_configuration_get_interrupt_stack_size(); 186 187 /* 188 * Initialize default raw exception handlers. 189 */ 190 sc = ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT, 191 intrStackStart, 192 intrStackSize); 193 if (sc != RTEMS_SUCCESSFUL) BSP_panic("Cannot initialize exceptions"); 194 195 /* Continue with application-specific initialization */ 196 app_bsp_start(); 197 } 198 199 200 /* 201 * BSP pretasking hook. Called just before drivers are initialized. 202 * Used to setup libc and install any BSP extensions. 203 * 204 * Must not use libc (to do io) from here, since drivers are not yet 205 * initialized. 206 */ 207 208 void bsp_pretasking_hook(void) 209 { 210 app_bsp_pretasking_hook(); 211 } 212 213 214 /* 215 * BSP predriver hook. Called by boot_card() just before drivers are 216 * initialized. Clear out any stale interrupts here. 217 */ 218 void bsp_predriver_hook(void) 219 { 220 app_bsp_predriver_hook(); 221 } -
new file c/src/lib/libbsp/powerpc/virtex5/startup/dummy_console.c
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/dummy_console.c b/c/src/lib/libbsp/powerpc/virtex5/startup/dummy_console.c new file mode 100644 index 0000000..33f6a09
- + 1 #include <rtems.h> 2 #include <rtems/libio.h> 3 4 extern int app_memory_write(int minor, const char* buf, int len); 5 6 static rtems_termios_callbacks gMemCallbacks = { 7 0, /* firstOpen */ 8 0, /* lastClose */ 9 0, /* PollRead */ 10 app_memory_write, /* write */ 11 0, /* SetAttr */ 12 0, /* stopRemoteTx */ 13 0, /* startRemoteTx */ 14 0 /* outputUsesInterrupts */ 15 }; 16 17 rtems_device_driver console_initialize(rtems_device_major_number major, 18 rtems_device_minor_number minor, 19 void* arg) 20 { 21 rtems_status_code status; 22 23 rtems_termios_initialize(); 24 25 status = rtems_io_register_name("/dev/console", major, 0); 26 27 if (status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred (status); 28 return RTEMS_SUCCESSFUL; 29 } 30 31 rtems_device_driver console_open(rtems_device_major_number major, 32 rtems_device_minor_number minor, 33 void* arg) 34 { 35 rtems_status_code sc; 36 37 sc = rtems_termios_open (major, minor, arg, &gMemCallbacks); 38 39 return sc; 40 } 41 42 rtems_device_driver console_close(rtems_device_major_number major, 43 rtems_device_minor_number minor, 44 void* arg) 45 { 46 return rtems_termios_close(arg); 47 } 48 49 rtems_device_driver console_read(rtems_device_major_number major, 50 rtems_device_minor_number minor, 51 void* arg) 52 { 53 return rtems_termios_read(arg); 54 } 55 56 rtems_device_driver console_write(rtems_device_major_number major, 57 rtems_device_minor_number minor, 58 void* arg) 59 { 60 return rtems_termios_write(arg); 61 } 62 63 rtems_device_driver console_control(rtems_device_major_number major, 64 rtems_device_minor_number minor, 65 void* arg) 66 { 67 return rtems_termios_ioctl(arg); 68 } -
new file c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds b/c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds new file mode 100644 index 0000000..4f66ada
- + 1 /* 2 * This file contains directives for the GNU linker which are specific to the 3 * Virtex 5 PPC 440. No assumptions are made on the firmware in the FPGA. 4 * This file is intended to be used together with start.S to generate 5 * downloadable code. 6 */ 7 8 OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc") 9 OUTPUT_ARCH(powerpc) 10 11 ENTRY(download_entry) 12 13 MsgAreaSize = DEFINED(MsgAreaSize) ? MsgAreaSize : 1K; 14 RamBase = DEFINED(RamBase) ? RamBase : 0x0; 15 RamSize = DEFINED(RamSize) ? RamSize : 4096M - MsgAreaSize; 16 IntrStackSize = DEFINED(IntrStackSize) ? IntrStackSize : 16K; 17 StackSize = DEFINED(StackSize) ? StackSize : 64K; 18 HeapSize = DEFINED(HeapSize) ? HeapSize : 0; /* 0=Use def */ 19 20 21 MEMORY 22 { 23 VECTORS : ORIGIN = 0x00000000, LENGTH = 8K 24 RAM : ORIGIN = 0x00002000, LENGTH = 4096M - 8K 25 } 26 27 28 SECTIONS 29 { 30 __exeentry = download_entry; 31 __exestart = 0x100; 32 .vectors __exestart : { *(.vectors) } > VECTORS 33 34 /* Read-only sections, merged into text segment: */ 35 .interp : { *(.interp) } > RAM 36 .hash : { *(.hash) } > RAM 37 .dynsym : { *(.dynsym) } > RAM 38 .dynstr : { *(.dynstr) } > RAM 39 .gnu.version : { *(.gnu.version) } > RAM 40 .gnu.version_d : { *(.gnu.version_d) } > RAM 41 .gnu.version_r : { *(.gnu.version_r) } > RAM 42 .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) } > RAM 43 .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) } > RAM 44 .rela.rodata : { *(.rela.rodata*) *(.rela.gnu.linkonce.r*) } > RAM 45 .rela.got : { *(.rela.got) } > RAM 46 .rela.got1 : { *(.rela.got1) } > RAM 47 .rela.got2 : { *(.rela.got2) } > RAM 48 .rela.ctors : { *(.rela.ctors) } > RAM 49 .rela.dtors : { *(.rela.dtors) } > RAM 50 .rela.init : { *(.rela.init) } > RAM 51 .rela.fini : { *(.rela.fini) } > RAM 52 .rela.bss : { *(.rela.bss) } > RAM 53 .rela.plt : { *(.rela.plt) } > RAM 54 .rela.sdata : { *(.rela.sdata) } > RAM 55 .rela.sbss : { *(.rela.sbss) } > RAM 56 .rela.sdata2 : { *(.rela.sdata2) } > RAM 57 .rela.sbss2 : { *(.rela.sbss2) } > RAM 58 .rela.dyn : { *(.rela.dyn) } > RAM 59 60 /* Initialization code */ 61 .init : { PROVIDE (_init = .); 62 *ecrti.o(.init) 63 KEEP(*(.init)) 64 *ecrtn.o(.init) 65 } > RAM 66 67 .text : { *(.entry) 68 *(.text) 69 *(.text.*) 70 71 /* Special FreeBSD sysctl sections */ 72 . = ALIGN (16); 73 __start_set_sysctl_set = .; 74 *(set_sysctl_*); 75 __stop_set_sysctl_set = ABSOLUTE(.); 76 *(set_domain_*); 77 *(set_pseudo_*); 78 79 /* .gnu.warning sections are handled specially by elf32.em 80 */ 81 *(.gnu.warning) 82 *(.gnu.linkonce.t*) 83 } > RAM 84 85 /* Finalization code */ 86 .fini : { PROVIDE (_fini = .); 87 *ecrti.o(.fini) 88 KEEP(*(.fini)) 89 *ecrtn.o(.fini) 90 } > RAM 91 92 /* Miscellaneous read-only data */ 93 .rodata : { *(.rodata.* .gnu.linkonce.r*) } > RAM 94 .rodata1 : { *(.rodata1) } > RAM 95 96 /* Initialised small data addressed as offsets from r2 */ 97 _SDA2_BASE_ = __SDATA2_START__ + 0x8000; 98 .sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } > RAM 99 100 /* Zeroed small data addressed as offsets from r2 */ 101 .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) 102 103 /* Avoid empty sdata2/sbss2 area: __eabi would not set up 104 * r2 which may be important if run-time loading is used 105 */ 106 . += 1; 107 108 PROVIDE (__SBSS2_END__ = .); 109 } > RAM 110 111 /* Exception frame info */ 112 .eh_frame : { *(.eh_frame .eh_frame.*) } > RAM 113 .eh_frame_hdr : { *(.eh_frame_hdr) } > RAM 114 115 /* Declares where the .text section ends */ 116 _etext = .; 117 PROVIDE (etext = .); 118 119 /* Initialized R/W Data section goes in RAM */ 120 .data : { PROVIDE(__DATA_START__ = ABSOLUTE(.) ); 121 *(.data) 122 *(.data.*) 123 *(.gnu.linkonce.d*) 124 } > RAM 125 126 .data1 : { *(.data1) } > RAM 127 128 PROVIDE (__EXCEPT_START__ = .); 129 .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) } > RAM 130 PROVIDE (__EXCEPT_END__ = .); 131 132 .got1 : { *(.got1) } > RAM 133 134 /* Put .ctors and .dtors next to the .got2 section, so that the pointers 135 * get relocated with -mrelocatable. Also put in the .fixup pointers. 136 * The current compiler no longer needs this, but keep it around for 2.7.2. 137 */ 138 PROVIDE (_GOT2_START_ = .); 139 .got2 : { *(.got2) } > RAM 140 141 .dynamic : { *(.dynamic) } > RAM 142 143 .ctors : { /* gcc uses crtbegin.o to find the start of 144 * the constructors, so we make sure it is 145 * first. Because this is a wildcard, it 146 * doesn't matter if the user does not 147 * actually link against crtbegin.o; the 148 * linker won't look for a file to match a 149 * wildcard. The wildcard also means that it 150 * doesn't matter which directory crtbegin.o 151 * is in. 152 */ 153 KEEP (*crtbegin.o(.ctors)) 154 /* We don't want to include the .ctor section from 155 * the crtend.o file until after the sorted ctors. 156 * The .ctor section from the crtend file contains the 157 * end of ctors marker and it must be last. 158 */ 159 KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) 160 KEEP (*(SORT(.ctors.*))) 161 KEEP (*(.ctors)) 162 } > RAM 163 164 .dtors : { KEEP (*crtbegin.o(.dtors)) 165 KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) 166 KEEP (*(SORT(.dtors.*))) 167 KEEP (*(.dtors)) 168 } > RAM 169 170 PROVIDE (_FIXUP_START_ = .); 171 .fixup : { *(.fixup) } > RAM 172 PROVIDE (_FIXUP_END_ = .); 173 174 PROVIDE (_GOT2_END_ = .); 175 176 PROVIDE (_GOT_START_ = .); 177 .got : { __got_start = .; 178 *(.got) 179 } > RAM 180 181 .got.plt : { *(.got.plt) } > RAM 182 PROVIDE (_GOT_END_ = .); 183 184 .jcr : { KEEP (*(.jcr)) } > RAM 185 186 /* We want the small data sections together, so single-instruction offsets 187 * can access them all, and initialized data all before uninitialized, so 188 * we can shorten the on-disk segment size. 189 */ 190 /* Initialised small data addressed as offsets from r13 */ 191 _SDA_BASE_ = __SDATA_START__ + 0x8000; 192 .sdata : { *(.sdata* .gnu.linkonce.s.*) } > RAM 193 194 _edata = .; 195 PROVIDE (edata = .); 196 197 /* Zeroed small data addressed as offsets from r13 */ 198 .sbss : { PROVIDE (__sbss_start = .); 199 *(.dynsbss) 200 *(.sbss*) 201 *(.gnu.linkonce.sb.*) 202 *(.scommon) 203 204 /* Avoid empty sdata/sbss area: __eabi would not set up 205 * r13, which may be important if run-time loading is used 206 */ 207 . += 1; 208 209 PROVIDE (__SBSS_END__ = .); 210 PROVIDE (__sbss_end = .); 211 } > RAM 212 213 .plt : { *(.plt) } > RAM 214 .iplt : { *(.iplt) } > RAM 215 216 /* Zeroed large data */ 217 .bss : { PROVIDE (__bss_start = .); 218 *(.dynbss) 219 *(.bss) 220 *(.bss.*) 221 *(.gnu.linkonce.b*) 222 *(COMMON) 223 224 PROVIDE (__bss_end = ALIGN(4)); 225 __bss_size = __bss_end - __bss_start; 226 } > RAM 227 228 __exeend = ALIGN(4); 229 __rtems_end = .; 230 . = ALIGN(0x20); /* Align to a cache-line boundary */ 231 PROVIDE(__bsp_ram_start = .); 232 233 /* Interrupt stack: aligned on a cache-line boundary */ 234 . += IntrStackSize; 235 __intrStack = .; 236 237 /* Main stack lives here */ 238 _stack = ALIGN(0x20); /* Align to a cache-line boundary */ 239 . += StackSize; 240 __stack_base = .; /* Initial stack builds downwards */ 241 242 /* RTEMS workspace: size specified by application */ 243 WorkAreaBase = ALIGN(0x20); /* Align to a cache-line boundary */ 244 245 /* The heap comes after the work space */ 246 247 . = RamBase + RamSize - MsgAreaSize; 248 PROVIDE(__bsp_ram_end = .); 249 250 /* Message area for capturing early printk output */ 251 /* Placed here to be easily findable with a debugger */ 252 MsgAreaBase = __bsp_ram_end; 253 . += MsgAreaSize; 254 255 __phy_ram_end = .; /* True end of physical memory */ 256 257 /DISCARD/ : 258 { 259 *(.comment) 260 } 261 262 /* Some configuration constants */ 263 __vectors = 0; 264 } -
new file c/src/lib/libbsp/powerpc/virtex5/startup/start.S
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/start.S b/c/src/lib/libbsp/powerpc/virtex5/startup/start.S new file mode 100644 index 0000000..1afa587
- + 1 /*!@file start.S 2 * 3 * @brief Initialization code to set up the CPU and call boot_card() 4 * 5 * This "BSP" targets the Xilinx Virtex XC5VFX70T and related parts. This 6 * BSP makes no assumptions on what firmware is loaded into the FPGA. 7 * 8 * Provides the .entry section code. This is the first code to run in 9 * the PPC after download to RAM. Excecution in this case starts at 10 * 'download_entry'. 11 * 12 * The entrypoint 'start' is provided for the case where a bootloader has 13 * initialized the CPU, and all that remains to do is to set up a C 14 * environment and call boot_card. 15 * 16 * Derived from virtex dlentry and others. 17 * 18 * Some portions of this code follow section 3.4 of the PPC440x5 CPU Core User's 19 * Manual v7.1 from IBM. Other parts were derived from examples provided 20 * by Xilinx in their ML510 Reference Designs, e.g., ml510_bsb1_design_ppc440. 21 * See boot.S in standalone/, for example. 22 * 23 * References: 24 * Embedded Processor Block in Virtex-5 FPGAs Reference Guide UG200 (v1.8) 25 * http://www.xilinx.com/support/documentation/user_guides/ug200.pdf 26 * 27 * PowerPC 440x5 Embedded Processor Core User's Manual (Version 7.1) 28 * https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_440_Embedded_Core 29 * 30 * @author Richard Claus <claus@SLAC.Stanford.edu> 31 * 32 * @date March 4, 2011 -- Created 33 * 34 * $Revision: 675 $ 35 * 36 * @verbatim Copyright 2011 37 * by 38 * The Board of Trustees of the 39 * Leland Stanford Junior University. 40 * All rights reserved. 41 * 42 * Work supported by the U.S. Department of Energy under contract 43 * DE-AC03-76SF00515. 44 * 45 * Disclaimer Notice 46 * 47 * The items furnished herewith were developed under the sponsorship 48 * of the U.S. Government. Neither the U.S., nor the U.S. D.O.E., nor the 49 * Leland Stanford Junior University, nor their employees, makes any war- 50 * ranty, express or implied, or assumes any liability or responsibility 51 * for accuracy, completeness or usefulness of any information, apparatus, 52 * product or process disclosed, or represents that its use will not in- 53 * fringe privately-owned rights. Mention of any product, its manufactur- 54 * er, or suppliers shall not, nor is it intended to, imply approval, dis- 55 * approval, or fitness for any particular use. The U.S. and the Univer- 56 * sity at all times retain the right to use and disseminate the furnished 57 * items for any purpose whatsoever. Notice 91 02 01 58 * 59 * @endverbatim 60 */ 61 62 #include <rtems/asm.h> 63 #include <rtems/powerpc/powerpc.h> 64 65 #define V_TS_SZ_I 0x0290 // V,TS=0(Inst),SIZE=9,TID=0 66 #define V_TS_SZ_D 0x0390 // V,TS=1(Data),SIZE=9,TID=0 67 #define WIMG_U_S_0 0x043F // !(U0-3),!W, I,!M,!G,!E,UX,UW,UR,SX,SW,SR 68 #define WIMG_U_S_1 0x003F // !(U0-3),!W,!I,!M,!G,!E,UX,UW,UR,SX,SW,SR 69 #define PAGE_SZ 0x10000000 // 256 MB 70 71 /* 72 * The virtex ELF link scripts support some special sections: 73 * .entry The actual entry point 74 * .vectors The section containing the interrupt entry veneers. 75 */ 76 77 /* 78 * Downloaded code loads the vectors separately to 0x00000100, 79 * so .entry can be over 256 bytes. 80 * 81 * The other sections are linked in the following order: 82 * .entry 83 * .text 84 * .data 85 * .bss 86 * see linker command file for section placement 87 * 88 * The initial stack is set to __stack_base 89 * 90 * All the entry veneer has to do is to clear the BSS. 91 */ 92 93 .section .entry 94 95 PUBLIC_VAR(download_entry) 96 PUBLIC_VAR(__rtems_entry_point) 97 SYM(download_entry): 98 SYM(__rtems_entry_point): 99 b startupDL /* Entry point used by xmd dow command */ 100 101 PUBLIC_VAR (start) 102 SYM(start): 103 b startupBL /* Entry point used by bootLoader */ 104 105 base_addr: 106 /*------------------------------------------------------------------- 107 * Parameters from linker 108 *-----------------------------------------------------------------*/ 109 toc_pointer: 110 .long __got_start 111 bss_length: 112 .long __bss_size 113 bss_addr: 114 .long __bss_start 115 stack_top: 116 .long __stack_base 117 118 119 .eject 120 121 /*------------------------------------------------------------------ 122 * This code follows section 3.4 of the PPC440x5 CPU Core User's 123 * Manual. The numbers in the comments refer to the step numbers 124 * therein. Some of the implementation comes from examples provided 125 * by Xilinx in their ML510 Reference Designs, e.g., 126 * ml510_bsb1_design_ppc440. See boot.S in standalone/. 127 *------------------------------------------------------------------*/ 128 /*------------------------------------------------------------------ 129 * This code is designed to accomodate warm restarts, in which the 130 * application software triggers the restart of the system by branching 131 * to the following code (either boot or boot1) without causing 132 * one of the hardware resets: core, chip, system or JTAG (section 133 * 3.2,3 in the Power PC 440-S Embedded Processor Core User's Manual). 134 *-----------------------------------------------------------------*/ 135 136 /* ----------------------------------------------------------------- 137 * Setup CPU 138 *-----------------------------------------------------------------*/ 139 first: li r0,0 // Clear r0 140 141 /* ----------------------------------------------------------------- 142 * Initialize the memory system. 143 *------------------------------------------------------------------*/ 144 iccci r0,r0 // 2. Invalidate instruction cache 145 dccci r0,r0 // 3. Invalidate data cache 146 msync // 4. Force in-progress data PLB ops to complete 147 148 mfdbcr0 r2 // 5. Disable all debug events 149 lis r3,0x8100 150 and r2,r2,r3 // Ignore EDM,TRAP to allow XMD use 151 mtdbcr0 r2 152 li r2,-1 153 mtdbsr r2 // 6. Initialize all debug event status 154 155 /*------------------------------------------------------------------ 156 * Set Core Configuration Register 0 as follows: 157 * sum: 0x00200000 158 * bit 1 off Parity Recovery Enable 159 * bit 4 off Cache Read Parity Enable 160 * bit 10 on Disable Store Gathering 161 * bit 11 off Disable APU Instruction Broadcast 162 * bit 16 off Disable Trace Broadcast 163 * bit 17:18 off Specifies behaviour of icbt,dcbt/dcbtst insts 164 * bit 23 off Force Load/Store Alignment 165 * bit 28:29 off Instruction Cache Speculative Line Count 166 * bit 30:31 off Instruction Cache Speculative Line Threshold 167 * NB: UG200/pg 21: Spec. prefetching must be disabled 168 *------------------------------------------------------------------*/ 169 170 lis r2,0x0020 // 7. Set CCR0: DSTG 171 mtccr0 r2 // Configure CCR0 172 173 mtspr ccr1,r0 // 8. Clear CCR1 174 175 /*------------------------------------------------------------------ 176 * 9. Configure cache regions 177 *------------------------------------------------------------------*/ 178 mtspr inv0,r0 179 mtspr inv1,r0 180 mtspr inv2,r0 181 mtspr inv3,r0 182 mtspr dnv0,r0 183 mtspr dnv1,r0 184 mtspr dnv2,r0 185 mtspr dnv3,r0 186 mtspr itv0,r0 187 mtspr itv1,r0 188 mtspr itv2,r0 189 mtspr itv3,r0 190 mtspr dtv0,r0 191 mtspr dtv1,r0 192 mtspr dtv2,r0 193 mtspr dtv3,r0 194 195 /*------------------------------------------------------------------ 196 * Cache victim limits 197 * floors 0, ceiling max to use the entire cache -- nothing locked 198 *------------------------------------------------------------------*/ 199 lis r2, 0x0001f800@h 200 ori r2,r2,0x0001f800@l 201 mtspr ivlim,r2 202 mtspr dvlim,r2 203 204 /*------------------------------------------------------------------ 205 * Configure instruction and data cache regions: 206 * Set up register constants (r6,r7), page index (r5), address 207 * variable (r4), EPN_V_TS bits (r3) 208 * 209 * Word 0 bits: 0xX0000290, 0xX0000390 210 * Bits Field Inst Data Description 211 * 0:21 EPN 0-15 0-15 Effective Page Number 212 * 22 V 1 1 Valid 213 * 23 TS 0 1 Translation Address Space 214 * 24:27 SIZE 9 9 Page Size (9 = 256 MB) 215 * 38:31 TPAR 0 0 Tag Parity 216 * 32:39 TID 0 0 Translation ID (in the MMUCR) 217 * 218 * Word 1 bits: 0x00000000, 0x00000000 219 * Bits Field Inst Data Description 220 * 0:21 RPN 0 0 Real Page Number 221 * 22:23 PAR1 0 0 Parity for TLB word 1 222 * 28:31 ERPN 0 0 Extended Real Page Number 223 * 224 * Word 2 bits: 0x0000043f, 0x00000c3f 225 * Bits Field Inst Data Description 226 * 0: 1 PAR2 0 0 Parity for TLB word 2 227 * 16 U0 0 0 User-Defineable Storage Attribute 0 228 * 17 U1 0 0 User-Defineable Storage Attribute 1 229 * 18 U2 0 0 User-Defineable Storage Attribute 2 230 * 19 U3 0 0 User-Defineable Storage Attribute 3 231 * 20 W 0 0 Write-Through 232 * 21 I 1 1 Caching Inhibited 233 * 22 M 0 0 Memory Coherence Required 234 * 23 G 0 0 Guarded 235 * 24 E 0 0 Endian 236 * 26 UX 1 1 User State Execute Enable 237 * 27 UW 1 1 User State Write Enable 238 * 28 UR 1 1 User State Read Enable 239 * 29 SX 1 1 Supervisor State Execute Enable 240 * 30 SW 1 1 Supervisor State Write Enable 241 * 31 SR 1 1 Supervisor State Read Enable 242 *------------------------------------------------------------------*/ 243 244 mtspr mmucr,r0 // 10a. Clear MMUCR 245 li r7,WIMG_U_S_1 // Word 2: Pages are NOT cache inhibited 246 lis r6, PAGE_SZ@h // Page size constant 247 ori r6,r6,PAGE_SZ@l 248 mr r5,r0 // TLB entry index 249 mr r4,r0 // Initialize RPN to zero 250 mflr r28 // Save return address 251 bl tlbSetup // 10b. Set up the TLBs 252 mtlr r28 // Restore return address 253 254 /*------------------------------------------------------------------ 255 * Select whether Wait Enable, interrupts/exceptions and which address 256 * spaces should be enabled when application starts 257 *------------------------------------------------------------------*/ 258 lis r0, 0x00000000@h // 10d. MSR[IS]=0 MSR[DS]=0 259 ori r0,r0,0x00000000@l 260 mtsrr1 r0 261 mtsrr0 r28 // Return address 262 rfi // Context synchronize to invalidate shadow TLB contents 263 264 265 /*------------------------------------------------------------------- 266 * Entry point used when downloaded, e.g. through XMD 267 *------------------------------------------------------------------*/ 268 startupDL: 269 /*------------------------------------------------------------------- 270 * Do initialization up to the point where a context sync is required 271 *------------------------------------------------------------------*/ 272 bl first // Do first things first 273 274 /*------------------------------------------------------------------- 275 * 11. Tell the processor where the exception vector table will be 276 *------------------------------------------------------------------*/ 277 .extern SYM(__vectors) 278 lis r2, __vectors@h /* set EVPR exc. vector prefix */ 279 mtspr ivpr,r2 280 281 /*------------------------------------------------------------------ 282 * Set up default exception and interrupt vectors 283 *------------------------------------------------------------------*/ 284 li r1,0x100 285 mtivor0 r1 286 addi r1,r1,0x100 287 mtivor1 r1 288 addi r1,r1,0x100 289 mtivor2 r1 290 addi r1,r1,0x100 291 mtivor3 r1 292 addi r1,r1,0x100 293 mtivor4 r1 294 addi r1,r1,0x100 295 mtivor5 r1 296 addi r1,r1,0x100 297 mtivor6 r1 298 addi r1,r1,0x100 299 mtivor7 r1 300 addi r1,r1,0x100 301 mtivor8 r1 302 addi r1,r1,0x100 303 mtivor9 r1 304 addi r1,r1,0x100 305 mtivor10 r1 306 addi r1,r1,0x100 307 mtivor11 r1 308 addi r1,r1,0x100 309 mtivor12 r1 310 addi r1,r1,0x100 311 mtivor13 r1 312 addi r1,r1,0x100 313 mtivor14 r1 314 addi r1,r1,0x100 315 mtivor15 r1 316 317 /*------------------------------------------------------------------ 318 * 12. Configure debug facilities 319 *------------------------------------------------------------------*/ 320 mtdbcr1 r0 321 mtdbcr2 r0 322 mtiac1 r0 323 mtiac2 r0 324 mtiac3 r0 325 mtiac4 r0 326 mtdac1 r0 327 mtdac2 r0 328 mtdvc1 r0 329 mtdvc2 r0 330 mfdbcr0 r2 // Freeze timers on debug events 331 ori r2,r2,0x0001 332 mtdbcr0 r2 333 isync 334 335 /*------------------------------------------------------------------- 336 * 13. Configure timer facilities 337 *------------------------------------------------------------------*/ 338 mtdec r0 // Clear Decrementer to prevent exception 339 mttbu r0 // Clear Timebase to prevent Fixed Interval.. 340 mttbl r0 // ..timer and Watchdog Timer exceptions 341 mtpit r0 // Programmable interval timer 342 li r1,-1 // -1 to clear TSR 343 mttsr r1 // Timer status register 344 345 /*------------------------------------------------------------------- 346 * Clear out stale values in certain registers to avoid confusion 347 *------------------------------------------------------------------*/ 348 li r0,0 349 mtcrf 0xff,r0 // Need for simulation 350 mtctr r0 // Counter register 351 mtxer r0 // Fixed-point exception register 352 mtesr r0 // Exception syndrome register 353 mtdear r0 // Data exception address register 354 mtmcsr r0 // Machine check syndrome register 355 356 /* Fall through */ 357 358 /* ------------------------------------------------------------------- 359 * If a bootloader has run that has already initialized the CPU, 360 * which among other things has loaded this code into memory and 361 * jumped to start above, the initialization above does not need 362 * to be redone. Execution thus resumes here. 363 *------------------------------------------------------------------*/ 364 365 startupBL: 366 /*------------------------------------------------------------------- 367 * Load the parameter table base address 368 *------------------------------------------------------------------*/ 369 lis r1, base_addr@h 370 ori r1,r1,base_addr@l 371 372 /*------------------------------------------------------------------- 373 * Setup stack for RTEMS and call boot_card(). From this 374 * point forward registers will be used in accordance with the 375 * PowerPC EABI. 376 * 377 * boot_card() supervises the initialization of RTEMS and the C 378 * library. It calls bsp_start(), bsp_pretasking_hook(), etc. 379 *------------------------------------------------------------------*/ 380 lwz r2,toc_pointer-base_addr(r1) /* set r2 to toc */ 381 lwz r1,stack_top-base_addr(r1) /* set r1 to stack_top */ 382 383 /* Align as required by ABI */ 384 li r3,PPC_STACK_ALIGNMENT-1 385 andc r1,r1,r3 386 387 /*------------------------------------------------------------------- 388 * Set up r2 and r13. Upon entry r1 must have a nonzero value 389 * as it will be stored in an "init done" flag. Stupid but true. 390 * r1 must also be set up as a stack pointer as __eabi() jumps 391 * to __init() which has a standard function prolog. 392 *------------------------------------------------------------------*/ 393 bl __eabi /* setup EABI and SYSV environment */ 394 395 /*------------------------------------------------------------------- 396 * Zero the .bss, .sbss and .sbss2 sections. 397 * Must have r2 and r13 properly set. 398 *------------------------------------------------------------------*/ 399 bl zero_bss /* Assume Bank regs set up..., cache etc. */ 400 401 /*------------------------------------------------------------------- 402 * Create a minimal stack frame for this code, the caller of boot_card(). 403 *------------------------------------------------------------------*/ 404 addi r1,r1,-PPC_MINIMUM_STACK_FRAME_SIZE 405 406 xor r3,r3,r3 /* Clear r3 */ 407 stw r3,0(r1) /* Clear stack chain */ 408 stw r3,4(r1) 409 stw r3,8(r1) 410 stw r3,12(r1) 411 lis r5,environ@ha 412 la r5,environ@l(r5) /* environp */ 413 414 /*------------------------------------------------------------------- 415 * Call boot_card() with its arguments, the command-line pointer and 416 * the argument count, set to NULL. 417 *------------------------------------------------------------------*/ 418 li r4,0 /* argv */ 419 li r3,0 /* argc */ 420 .extern SYM (boot_card) 421 b SYM (boot_card) /* call the first C routine */ 422 423 424 .eject 425 426 /*------------------------------------------------------------------ 427 * Set up TLB entries: 2 entries are needed for the same 256MB page 428 * one for instruction memory and the other for data memory. 429 * (TS bit=0 for instructions) 430 *------------------------------------------------------------------*/ 431 tlbSetup: 432 1: ori r3,r4,V_TS_SZ_I // Fold V_TS_SZ in with EPN=RPN 433 tlbwe r3,r5,0 // Word 0: EPN_V_TS_SZ (Instructions) 434 tlbwe r4,r5,1 // Word 1: RPN_ERPN 435 tlbwe r7,r5,2 // Word 2: WIMG_U_S 436 ori r3,r4,V_TS_SZ_D // Fold V_TS_SZ in with EPN=RPN 437 addi r5,r5,1 // Next TLB entry 438 tlbwe r3,r5,0 // Word 0: EPN_V_TS_SZ (Data) 439 tlbwe r4,r5,1 // Word 1: RPN_ERPN 440 tlbwe r7,r5,2 // Word 2: WIMG_U_S 441 add r4,r4,r6 // Increment RPN to next 256MB block 442 addi r5,r5,1 // Next TLB entry 443 cmpwi r5,32 // Done yet? 444 bne 1b 445 li r0,0 446 2: // Zero out index 32-63 TLB entries 447 tlbwe r0,r5,0 448 tlbwe r0,r5,1 449 tlbwe r0,r5,2 450 addi r5,r5,1 451 cmpwi r5,64 452 bne 2b 453 454 blr