Changes between Version 17 and Version 18 of TBR/BSP/Mcf5235


Ignore:
Timestamp:
Nov 8, 2018, 2:16:09 PM (9 months ago)
Author:
Madhav Mehndiratta
Comment:

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Legend:

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  • TBR/BSP/Mcf5235

    v17 v18  
    11= Mcf5235 =
    22
     3||BSP_name||M523xEVB||
     4||Manufacturer||Freescale||
     5||Image||
     6||Caption||optional image caption||
     7||Board_URL||http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=M523xEVB&parentCode=MCF523X&fpsp=1&nodeId=0162468rH3YTLC00M91752||
     8||Architecture||m68k||
     9||CPU_model||MCF5235||
     10||Monitor||dBUG||
     11||Simulator||none||
     12||Aliases||none||
     13||RAM||32 MB||
     14||NVMEM||2 MB Flash||
     15||Serial||2 Included in Processor. (processor supports 3)||
     16||NICs||one. 100BaseT included in Processor.||
     17||Other||Processor, but not BSP, includes eTPU, CAN, I2C, and QSPI. BDM debugger port on board.||
    318
    4 {{Infobox BSP
    5 |BSP_name     = M523xEVB
    6 |Manufacturer = Freescale
    7 |image        =
    8 |caption      = optional image caption
    9 |Board_URL    = http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=M523xEVB&parentCode=MCF523X&fpsp=1&nodeId=0162468rH3YTLC00M91752
    10 |Architecture = m68k
    11 |CPU_model    = MCF5235
    12 |Monitor      = dBUG
    13 |Simulator    = none
    14 |Aliases      = none
    15 |RAM          = 32 MB
    16 |NVMEM        = 2 MB Flash
    17 |Serial       = 2 Included in Processor. (processor supports 3)
    18 |NICs         = one. 100BaseT included in Processor.
    19 |Other        = Processor, but not BSP, includes eTPU, CAN, I2C, and QSPI. BDM debugger port on board.
    20 }}
    2119
    2220This BSP includes work done for other BSPs written by [wiki:EricNorum EricNorum], DPeterSiddons, [wiki:TillStraumann TillStraumann], [wiki:BrettSwimley BrettSwimley], and [wiki:JayMonkman JayMonkman]. It is based heavily on the uC5282 BSP.