wiki:TBR/BSP/Erc32
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Version 2 (modified by JoelSherrill, on 09/07/05 at 18:04:28) (diff)

Added information.

Erc32

This BSP is for the space hardened SPARC V7 processor developed by the European Space Agency and in use by numerous projects. The ERC32 includes serial ports and timers on the CPU so one BSP can support many of the ERC32 boards.

There is a Tharsys board which includes a network interface. This BSP can be configured to support that board as well.

Test Reports

4.6.4: User:JoelSherrill? reports that it runs fine on the SIS in gdb 5.3.

4.6.99.2: User::JoelSherrill? reports that it runs fine on the SIS in gdb 6.3 once you disable the code section in start.s which copies initialized data from ROM to RAM.