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#4962 assigned defect

MicroBlaze BSPs modify carry flag before MSR is saved

Reported by: Alex White Owned by: Alex White
Priority: normal Milestone: 6.1
Component: bsps Version: 6
Severity: normal Keywords:
Cc: Blocked By:


The interrupt handler for the MicroBlaze? BSPs defined in bsps/microblaze/microblaze_fpga/start/_interrupt_handler.S saves one register to the stack, R5, before jumping to the architecture _ISR_Handler. This is because R5 is used to pass the interrupt source if it is known. To indicate an unknown interrupt source, it uses the following instruction:

	addi r5, r0, 0xFF

The addi instruction modifies the carry flag in MSR. This is a problem because MSR has not been saved to the stack yet. It is saved in _ISR_Handler.

This went unnoticed because it manifests itself in subtle ways. It requires that an interrupt happen somewhere between an instruction that modifies the carry flag and an instruction that uses the modified carry flag.

To resolve this issue, the entire interrupt frame should be saved as the first step of _interrupt_handler rather than in _ISR_Handler. It should also be made very clear that saving the stack frame is handled by the BSP rather than the architecture-specific _ISR_Handler.

Change History (1)

comment:1 Changed on 10/23/23 at 18:49:22 by Alex White

Owner: set to Alex White
Status: newassigned
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