motorola_shared i8259 interrupt cascade from int2 block not working

[gregory.menke]

Default onboard dec21140 int 10 not generating interrupts, causing
onboard ethernet to not work. Temporary workaround is to preconfigure
the dec device with its hardcoded MPIC irq (18, 0x12) from the ppcbug
prompt;

csaw 0 e 0 3c 12;b

i8259 interrupts from controller 1 are working.

At least MCP750 and MTX603 bsps are affected. Bug possibly extends
to all other devices on controller 2.

7/15 - MTX603 is not affected. Bug possibly related to openpic config
but diffs not yielding any hints yet. Work continues...

7/16 - problem is the bootstrap PCI remapping code was shifting some of the
IO space base addresses out from under the PCI I/O primitive macros, causing
the i8259 manipulation to fail at least in part. Restricting the PCI IO space
remapping to busses > 1 avoids the problem. The nasty part of this issue is
the motorola_shared bsp relies on the boot monitor default PCI mapping
configurations to work, which are rigged to emulate those of a PC. This is somewhat
horrible, but converting the PCI I/O primitives to use programmed base addresses
is fairly awful too.

I will submit a patch against rtems-ss-20030703 to fix this.

Release:
RTEMS-4.5

Environment:
rtems-ss-20030703

[gregory.menke]

State-Changed-From-To: open->closed
State-Changed-Why: fixed by PR 432