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#4056 closed defect (fixed)

bsps/xilinx-zynq: Flush TX-Buffer before initializing the zynq-uart (cloned)

Reported by: Jan Sommer Owned by: Jan Sommer <jan.sommer@…>
Priority: normal Milestone: 5.1
Component: bsps Version: 5
Severity: normal Keywords:
Cc: Blocked By:
Blocking:

Description

Cloned from #4055:


We experienced that u-boot (at least from Xilinx repositories) does not wait until all its output has left the TX Buffer of the stdout uart, before handing over to the RTEMS application

This causes some garbage output at the begin of the RTEMS application in some cases and corrupts the test begin marker prohibiting rtems-test to recognize the test correctly.

Proposed fix is to let RTEMS wait until the TX Buffer of the uart is empty before configuring and using it.

Change History (2)

comment:1 Changed on 08/22/20 at 07:29:38 by Jan Sommer <jan.sommer@…>

Owner: set to Jan Sommer <jan.sommer@…>
Resolution: fixed
Status: newclosed

In [changeset:"b87efa7599f33f56608da20567d77dbb06db98e1/rtems" b87efa7/rtems]:

Error: Processor CommitTicketReference failed
/data/trac/repo/rtems.git does not appear to be a Git repository.

comment:2 Changed on 08/22/20 at 07:30:22 by Jan Sommer <jan.sommer@…>

In [changeset:"61ccb9c05dcd695114541960aa6bfc1315f30514/rtems" 61ccb9c0/rtems]:

Error: Processor CommitTicketReference failed
/data/trac/repo/rtems.git does not appear to be a Git repository.
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