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Opened on 06/02/09 at 22:56:54

Closed on 11/09/09 at 14:49:30

#1420 closed defect (fixed)

MCF5282 chip errata -- Buffered Write May Be Executed Twice

Reported by: Eric Norum Owned by: Joel Sherrill
Priority: normal Milestone: 4.10
Component: bsps Version: 4.9
Severity: normal Keywords:
Cc: norume@… Blocked By:
Blocking:

Description

Buffered writes must be disabled as described in "MCF5282 Chip Errata",

MCF5282DE, Rev. 6, 5/2009:

SECF124: Buffered Write May Be Executed Twice
Errata type: Silicon
Affected component: Cache
Description: If buffered writes are enabled using the CACR or ACR

registers, the imprecise write transaction generated
by a buffered write may be executed twice.

Workaround: Do not enable buffered writes in the CACR or ACR registers:

CACR[8] = DBWE (default buffered write enable) must be 0
ACRn[5] = BUFW (buffered write enable) must be 0

Fix plan: Currently, there are no plans to fix this.

I have modified c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c and committed the change to the trunk and to the R4.9 branch.

Change History (1)

comment:1 Changed on 11/09/09 at 14:49:30 by Joel Sherrill

Resolution: → fixed
Status: new → closed

You applied patch so should be closed.

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