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source: rtems/c/src/lib/libbsp/m68k/uC5282/ChangeLog

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Diff Rev Age Author Log Message
(edit) @a81e4f1   04/09/05 01:59:49 WENorum FPGA interrupt status register is now 16-bit. 4.104.114.84.95
(edit) @3adc6c13   03/12/05 16:02:34 WENorum Add statistics counter for number of transmit bytes realigned. 4.104.114.84.95
(edit) @cbb615b   03/10/05 19:52:35 WENorum Add NOP after writing the CACR is there to address the issue noted in … 4.104.114.84.95
(edit) @059c95e   02/14/05 22:05:04 WENorum Don't cache flash. 4.104.114.84.95
(edit) @0b2c943   02/04/05 08:46:43 Ralf Corsepius 2005-02-04 Ralf Corsepius <ralf.corsepius@…> * … 4.104.114.84.95
(edit) @be129f69   02/04/05 08:43:39 Ralf Corsepius 2005-02-04 Ralf Corsepius <ralf.corsepius@…> * … 4.104.114.84.95
(edit) @3479b8b1   02/04/05 00:40:43 Joel Sherrill Fixed formatting. 4.104.114.84.95
(edit) @d75023e   02/03/05 22:52:26 WENorum Add 'extended' BSP support (pseudo-VME) 4.104.114.84.95
(edit) @98653c6   02/02/05 19:55:59 WENorum Lock FEC/PHYS at 100 Mbs, full-duplex. 4.104.114.84.95
(edit) @7eab0f78   02/01/05 17:16:41 WENorum Add some bootrom system calls. 4.104.114.84.95
(edit) @7c7184a   02/01/05 15:12:55 WENorum Place FEC buffer descriptors in static RAM. No more cache concerns. 4.104.114.84.95
(edit) @518edef   01/31/05 19:03:41 WENorum Processor doesn't snoop FEC DMA so we must invalidate the cache … 4.104.114.84.95
(edit) @239b819   01/31/05 14:37:03 Joel Sherrill 2005-01-31 Joel Sherrill <joel@…> * .cvsignore: New file. 4.104.114.84.95
(add) @098c4f9a   01/31/05 14:37:00 Joel Sherrill New file. 4.104.114.84.95
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