Changes between Version 2 and Version 3 of TBR/UserManual/SparcBSPStartup


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Timestamp:
Jan 3, 2008, 11:08:21 PM (12 years ago)
Author:
Drakferion
Comment:

typo enter removed

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  • TBR/UserManual/SparcBSPStartup

    v2 v3  
    1010 *  An issue with the 3-chip version of ERC32 is that the timer scaling register can not be read, only written (!).  The rtems application can therefore not read the timer scaler to figure out which frequency the board is running at. To solve this, both the mkprom loader and the simulator writes a copy of the scaler value to trap entry 0x7e in the sparc trap table, because this trap can never occur anyway. The rtems application picks up the value from there and now knows the frequency and can generate proper timer events etc.
    1111
    12  *  Possible cause of the problem: Fabrício could be running rdbmon debug monitor on his board, using it to download and start applications. rdbmon is an application on its own, and needs to insert its trap vectors into the rtems applications trap table. This is done by starting the application in user mode. The first priviledged instruction that occurs is a write to %tbr (trap base register). This instruction will trap and control is transfered to rdbmon. The monitor can read out the value of the new %tbr, insert its trap entries there, write the scaler value in 0x7e of the new
    13 trap table, and re-start the application is supervisor mode.  What can not be done (and this is also mentioned in the
    14 leccs/rdbmon manual) is to single step through this procedure. What can also not be done is to use a custom loader that does not write 0x7e, or custom start up code that re-allocates the trap table.
     12 *  Possible cause of the problem: Fabrício could be running rdbmon debug monitor on his board, using it to download and start applications. rdbmon is an application on its own, and needs to insert its trap vectors into the rtems applications trap table. This is done by starting the application in user mode. The first priviledged instruction that occurs is a write to %tbr (trap base register). This instruction will trap and control is transfered to rdbmon. The monitor can read out the value of the new %tbr, insert its trap entries there, write the scaler value in 0x7e of the new trap table, and re-start the application is supervisor mode.  What can not be done (and this is also mentioned in the leccs/rdbmon manual) is to single step through this procedure. What can also not be done is to use a custom loader that does not write 0x7e, or custom start up code that re-allocates the trap table.
    1513
    1614Note that these issues are commented in start.S and spurious.c of the sparc/erc32 bsp.