Changes between Version 9 and Version 10 of TBR/UserManual/Simulators

Timestamp:

05/31/07 02:14:26 (17 years ago)

Author:

JoelSherrill

Comment:

Categorized by fixable and not worth fixing

TBR/UserManual/Simulators

@@ -12 +12 @@
  *  sparc/sis -- BSP for ERC32 with and without floating point unit which is simulated by the SPARC onstruction Simulator (SIS) in gdb.
 
- *  arm/edb7312 -- [http://www.skyeye.org] This has worked at times but as of May 2008 did not run the current code.  It would be nice to get this one working again. Highly configurable ARM emulator capable of supporting various ARM chip families (w/ or w/o MMU support), LCD and network (ne2k like). Very configurable by simple editing skyeye.conf in the current directory.  See [wiki:TBR/BSP/Edb7312 edb7312] for details on how to run this simulator.
+ *  arm/edb7312 -- [http://www.skyeye.org SkyEye] This has worked at times but as of May 2008 did not run the current code.  It would be nice to get this one working again. Highly configurable ARM emulator capable of supporting various ARM chip families (w/ or w/o MMU support), LCD and network (ne2k like). Very configurable by simple editing skyeye.conf in the current directory.  See [wiki:TBR/BSP/Edb7312 edb7312] for details on how to run this simulator.
 = Simulators with Issues =
 
 
 These are simulators which are known to work with RTEMS but require something that is above and beyond the call of duty.  The simulator may be using unsubmitted patches, slower than molasses running uphill, not enough features, or something even more unique.  If you can help one of these out, pitch in.  It would be appreciated.
+= Fixable =
+
+ *  h8300/h8sim -- synthetic board simulated in gdb.  Does not appear to support clock tick interrupts.
+ *  m68k/mcf5206elite -- free [http://www.slicer.ca/coldfire/ Coldfire] simulator.  It is VERY slow and does not appear to be easy to automate running of tests but it does work and is worth spot checking the BSP with.  It may be merged into SkyEye eventually.   Version 0.3.0 of this emulator is capable of running mcf5206elite BSP hello world example. For more details see: [http://www.rtems.com/ml/rtems-users/2006/january/msg00060.html]  This would be a good project.
+ *  m68k/sim68000 and m68k/simcpu32 -- BSP for mc68000 configuration of BSVC simulator.  Simulator is no longer supports, has licensing which prevented it from merging into gdb and requires a third-party patch to support CPU32 and redirecting console to stdout.
+ *  sh/shsim and sh/simsh7045 -- BSP for sh7032 as simulated in gdb.  Joel has not used these and recalls there being an unmerged patch against an old gdb version.
+= Unlikely to be Worth Fixing =
 
  *  arm/armulator -- synthetic board simulated in gdb. Does not appear to support clock tick interrupts.
  *  c4x/c3xsim and c4x/c4xsim -- simulator for C30/C31/c32 CPU models and all peripherals in gdb with appropriate patch against a very old gdb.
  *  hppa1.1/simhppa -- HP proprietary simulator of HP7100 CPU.
- *  h8300/h8sim -- synthetic board simulated in gdb.  Does not appear to support clock tick interrupts.
  *  i960/i960sim -- synthetic board simulated in gdb.  Does not appear to support clock tick interrupts.
- *  m68k/mcf5206elite -- free Coldfire simulator [http://www.slicer.ca/coldfire/].  It is VERY slow and does not appear to be easy to automate running of tests.  It may be merged into SkyEye eventually.   Version 0.3.0 of this emulator is capable of running mcf5206elite BSP hello world example. For more details see: [http://www.rtems.com/ml/rtems-users/2006/january/msg00060.html]  This would be a good project.
- *  m68k/sim68000 and m68k/simcpu32 -- BSP for mc68000 configuration of BSVC simulator.  Simulator is no longer supports, has licensing which prevented it from merging into gdb and requires a third-party patch to support CPU32 and redirecting console to stdout.
- *  or32/orp -- simulator provided by OpenCores project.
- *  sh/shsim and sh/simsh7045 -- BSP for sh7032 as simulated in gdb.  Joel has not used these and recalls there being an unmerged patch against an old gdb version.
+ *  or32/orp -- simulator provided by OpenCores project.  OpenCores CPU has been dropped from current RTEMS sources due to apparent inactivity of CPU developers.
 = Simulators Which Need Further Investigation =