Changes between Version 17 and Version 18 of TBR/UserManual/Floating_Point_Support

Timestamp:

08/07/09 01:12:44 (15 years ago)

Author:

KenPeters

Comment:

TBR/UserManual/Floating_Point_Support

@@ -161 +161 @@
 The core internal RTEMS ISR handler ({{{_ISR_Handler</code>, CPU dependent, generally found in {{{cpukit/score/cpu/<cpu name>/cpu_asm.S</code>), that executes to call user ISR handlers registered via {{{rtems_interrupt_catch</code>, does not save and restore FPU registers (in most if not all CPUs). Thus, user ISR handlers should not modify FPU registers (unless you take care of them yourself).
 
-Given the current state of the GCC compilers, this means user ISR handlers need to be compiled with {{{-msoft-float</code>, so that the compiler does not emit any FPU instructions as part of the handler.
+Given the current state of the GCC compilers, this means user ISR handlers need to be compiled with {{{-msoft-float</code>, so that the compiler does not emit any FPU instructions or use FPU registers as part of the handler.