Changes between Version 17 and Version 18 of TBR/UserManual/Floating_Point_Support


Ignore:
Timestamp:
Aug 7, 2009, 1:12:44 AM (10 years ago)
Author:
KenPeters
Comment:

Legend:

Unmodified
Added
Removed
Modified
  • TBR/UserManual/Floating_Point_Support

    v17 v18  
    161161The core internal RTEMS ISR handler ({{{_ISR_Handler</code>, CPU dependent, generally found in {{{cpukit/score/cpu/<cpu name>/cpu_asm.S</code>), that executes to call user ISR handlers registered via {{{rtems_interrupt_catch</code>, does not save and restore FPU registers (in most if not all CPUs). Thus, user ISR handlers should not modify FPU registers (unless you take care of them yourself).
    162162
    163 Given the current state of the GCC compilers, this means user ISR handlers need to be compiled with {{{-msoft-float</code>, so that the compiler does not emit any FPU instructions as part of the handler.
     163Given the current state of the GCC compilers, this means user ISR handlers need to be compiled with {{{-msoft-float</code>, so that the compiler does not emit any FPU instructions or use FPU registers as part of the handler.