Changes between Version 16 and Version 17 of TBR/UserManual/Floating_Point_Support

Timestamp:

08/06/09 22:25:27 (15 years ago)

Author:

KenPeters

Comment:

TBR/UserManual/Floating_Point_Support

@@ -156 +156 @@
  *  Have {{{cpu.h</code> set {{{CPU_SOFTWARE_FP TRUE</code>. A quick look through the RTEMS source code indicates that this may work to properly activate the RTEMS library support. However, I have not looked into this thoroughly, and there may be BSP-specific problems with this, such as not enabling the hardware FPU.
  *  Get GCC to provide a specific named optimization option to enable/disable the storage of integer variables in FPU registers. Then instead of deleting all hardware floating point, we could allow it but only for actual floating point activities. Any GCC developers out there?
+=  ISR Support  =
+
+
+The core internal RTEMS ISR handler ({{{_ISR_Handler</code>, CPU dependent, generally found in {{{cpukit/score/cpu/<cpu name>/cpu_asm.S</code>), that executes to call user ISR handlers registered via {{{rtems_interrupt_catch</code>, does not save and restore FPU registers (in most if not all CPUs). Thus, user ISR handlers should not modify FPU registers (unless you take care of them yourself).
+
+Given the current state of the GCC compilers, this means user ISR handlers need to be compiled with {{{-msoft-float</code>, so that the compiler does not emit any FPU instructions as part of the handler.