= TNC =

As of 2010, the TNC project has been discontinued.

ESA’s effort for providing a radiation tolerant microprocessor to be the heart of future European spacecraft computers has evolved and been demonstrated on the LEON microprocessor. The LEON architecture is based on the SPARC v8 architecture and is a continuation of the ERC32, which was based on the SPARC v7. The intention was to build an architecture that would provide similar performances to the US microprocessors, with an “open source” non-fault-tolerant version for the general European market and develop the LEON architecture for a fault-tolerant and a flight model version.

The work activity would consist on the consolidation of the development environment for the LEON, to identify the weaknesses and to implement or propose future implementations to the referred development environment.

The main objectives of this project are:
- To provide a view of the actual available development environment for the LEON.

- To port the ESA Ravenscar Benchmark (ERB) from the current ERC32 version to the LEON version.

- To analyze and evaluate the results generated by the ERB harness tests ported to the LEON. The tests will be performed on real hardware, due to the fact that the simulators do not provide the exact behavior of the real hardware.

- To propose improvements of the LEON development environment, thanks to the knowledge of the companies participating to this proposal and the experience gained during the porting of ERB.

- To implement part of the agreed improvements of the LEON development environment.

- To define the commercial availability and maintenance scheme for each element of the environment.

- To update the relevant documentations.