Changes between Version 3 and Version 4 of TBR/User/BenGras


Ignore:
Timestamp:
May 6, 2015, 11:29:29 AM (4 years ago)
Author:
Ben Gras
Comment:

flesh out api with example pin number definitions and example usage and file names and status codes

Legend:

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  • TBR/User/BenGras

    v3 v4  
    22
    33{{{#!c
     4
     5/* <rtems/gpio.h> */
     6
    47/* a configured GPIO pin handle. this is filled in by rtems_gpio_configure_pin_*
    58 * and can then be passed to other api functions.
     
    1518 * the gpio_pin struct is then filled in and can be passed to other functions.
    1619 */
    17 rtems_gpio_configure_pin_digital_out(&gpio_pin_handle, pin_number);
     20int rtems_gpio_configure_pin_digital_out(&gpio_pin_handle, pin_number);
    1821
    1922/* for a digital_out pin, set it to logical high */
    20 rtems_gpio_digital_set(&gpio_pin_handle);
     23int rtems_gpio_digital_set(&gpio_pin_handle);
    2124
    2225/* for a digital_out pin, set it to logical low */
    23 rtems_gpio_digital_clear(&gpio_pin_handle);
     26int rtems_gpio_digital_clear(&gpio_pin_handle);
    2427
    2528/* a currently configured pin is to be released and made unused, allowing repurposing. */
    26 rtems_gpio_release_pin(&gpio_pin_handle);
     29int rtems_gpio_release_pin(&gpio_pin_handle);
     30
     31/* returned error codes */
     32#define GPIO_SUCCESSFUL        0 /* operation OK */
     33#define GPIO_UNKNOWN_PIN       1 /* pin not known by bsp */
     34#define GPIO_UNCONFIGURED_PIN  2 /* pin not configured with rtems_gpio_configure_* */
     35#define GPIO_MISCONFIGURED_PIN 3 /* pin configuration doesn't match operation */
     36
     37/* <libcpu/am335x.h> */
     38
     39/* gpio pin definitions for the AM335X SOC */
     40#define AM335X_V9     63  /* GPIO1[31], SOC pin  V9 */
     41#define AM335X_V15    53  /* GPIO1[21], SOC pin V15 */
     42#define AM335X_U15    86  /* GPIO2[22], SOC pin U15 */
     43#define AM335X_T15    87  /* GPIO2[23], SOC pin T15 */
     44#define AM335X_V16    88  /* GPIO2[24], SOC pin V16 */
     45
     46/* <bsp/beagleboneblack.h> */
     47
     48/* gpio pin definitions - same as above but with names
     49 * indicating how they are wired on the Beaglebone Black board
     50 */
     51#define BBB_P8_20 71  63  /* GPIO1[31], BBB P8 header pin 20 */
     52#define BBB_LED_USR0  53  /* GPIO1[21], BBB USR0 LED */
     53#define BBB_LED_USR1  86  /* GPIO2[22], BBB USR1 LED */
     54#define BBB_LED_USR2  87  /* GPIO2[23], BBB USR2 LED */
     55#define BBB_LED_USR3  88  /* GPIO2[24], BBB USR3 LED */
     56
     57/* example usage */
     58
     59#include <rtems/gpio.h>
     60
     61struct gpio_pin_handle led_usr0_handle; /* opaque to the user */
     62
     63if(rtems_gpio_configure_pin_digital_out(&handle, led_usr0_handle) == GPIO_SUCCESS) {
     64    rtems_gpio_digital_set(&led_usr0_handle);
     65    rtems_gpio_release_pin(&led_usr0_handle);
     66}
     67
    2768}}}
     69