wiki:TBR/BSP/Tms570

Version 7 (modified by Pavel Pisa, on Dec 14, 2015 at 1:37:46 PM) (diff)

Add pointers to TMS570 LwIP port

Tms570

{{Infobox BSP |BSP_name = TMS570 |Manufacturer = Texas Instruments |image = TMS570LS31x_HDK_Kit.jpg |caption = TMS570LS31x HDK Kit |Board_URL = http://www.ti.com/tool/tmds570ls31hdk |Dimensions = 125 x 110 mm |Architecture = ARM Cortex-R (big-endian) |CPU_model = Texas Instruments Cortex-R TMS570LS3137 microcontroller |Power = Powered by included adapter |Aliases = None |RAM = 256 kB ECC SRAM internal + 8 MB SDRAM |NVMEM = 3 MB ECC Flash |Serial = 1 x I2C, 3 x CAN, 1 x 2ch FlexRay?, 2 x UARTs (1 with LIN), 3+2 x SPI |NICs = 10/100 Ethernet |Other = 2 x N2HET timing coprocessor, 2 x ADC }}

Warning

BSP is Work in the Progress state now. Its development started as Premysl Houdek's GSoC 2014 project at CTU FEE

The TMS570 support has been included in RTEMS mainline sources (commit).

Development version of RTEMS with BSP sources is available from GitHub? in tms570-bsp branch

The LwIP driver sources with TMS570 EMAC driver and RTEMS port included can be obtained from our other project repository

The application for testing of RTEMS with the LwIP port is included in our RTEMS OM template repository

Overview

The TMS570LS3137 device is a high-performance automotive-grade microcontroller family for safety systems. The safety architecture includes the following:

Features

  • Texas Instruments TMS570LS3137 MCU:
  • Dual CPUs in lockstep
  • CPU and memory Built-In Self-Test (BIST) logic
  • ECC on both the flash and the data SRAM
  • Parity on peripheral memories
  • Loopback capability on peripheral I/Os

Tool-chain

GCC 4.9.0 + Newlib 2.1.0 + Binutils 2.24 configuration

CFLAGS="-O2 -pipe" LDFLAGS=-s \
../../../src/gcc-4.9/configure --target=arm-rtems4.11 --prefix=/usr \
             --enable-languages=c,c++ \
             --disable-libstdcxx-pch \
             --with-gnu-ld \
             --with-gnu-as \
             --enable-threads \
             --enable-target-optspace \
             --with-system-zlib \
             --verbose \
             --disable-nls --without-included-gettext \
             --disable-win32-registry \
             --with-newlib \
             --enable-plugin \
             --enable-newlib-io-c99-formats \
             --enable-version-specific-runtime-libs \
             --enable-newlib-iconv \
             --disable-lto \

Next patches has been used during development to add Cortex-R and big-endian ARM support

The first target is soft-float RTEMS Cortex-R support. Next GCC options are used

-mbig-endian -march=armv7-r -mthumb

for future hard float alternative

-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard

Execution

We have not used any generic bootloader nor initial complex CPU and peripherals initialization and self test is implemented and included in RTEMS BSP. We use simple Ti's HalCoGen? generated application to setup board and then download RTEMS image over OpenOCD to internal ECC SRAM or external SDRAM. Setup application code is available there

Debugging

OpenOCD support with GDB and DDD frontend setup can be found there

Test Reports

The hello world, ticker and most of the other tests are running from internal SRAM. There are some issues for some of the tests when run from SDRAM. Running of test from Flash has been tested as well. Tests has been linked to offset start address in this case to left setup code to run before tests from Flash start.

References