Changes between Version 2 and Version 3 of TBR/BSP/Simcpu32


Ignore:
Timestamp:
Nov 7, 2018, 8:26:15 AM (11 months ago)
Author:
Mehr Mohammad Sachal
Comment:

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  • TBR/BSP/Simcpu32

    v2 v3  
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    33
    4 {{Infobox BSP
     4= BSP INFOBOX =
    55
    6 |BSP_name     = CPU32 Simulator
    7 |Manufacturer = ASH WARE MtDt
    8 |Board_URL       = http://www.phaedsys.com/principals/ashware/ashcpu.html
    9 |Architecture  = M68K
    10 |CPU_model    = CPU32
    11 |Simulator = TPU/CPU32 System Simulator
    12 |Aliases  =  SIMCPU32   
    13 |RAM     = RAM Unspecified
    14 |NVMEM = Unspecified
    15 |Serial Ports = 2 serial ports
    16 |Video  =  Video unspecified
    17 }}= CPU32 Simulator =
     6
     7||'''BSP_name'''||CPU32 Simulator||
     8||'''Manufacturer'''||ASH WARE MtDt||
     9||'''Board_URL'''||http://www.phaedsys.com/principals/ashware/ashcpu.html||
     10||'''Architecture'''||M68K||
     11||'''CPU_model'''||CPU32||
     12||'''Simulator'''||TPU/CPU32 System Simulator||
     13||'''Aliases'''||SIMCPU32||
     14||'''RAM'''||RAM Unspecified||
     15||'''NVMEM'''||Unspecified||
     16||'''Serial Ports'''||2 serial ports||
     17||'''Video'''||Video unspecified||
     18
     19= CPU32 Simulator =
    1820
    1921A CPU32 simulation engine under ASH WARE's MtDt simulation framework.