Changes between Version 1 and Version 2 of TBR/BSP/Simcpu32


Ignore:
Timestamp:
Jan 6, 2013, 2:40:21 AM (7 years ago)
Author:
C Rempel
Comment:

Contributed by Ayush as part of Google Code In 2012

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  • TBR/BSP/Simcpu32

    v1 v2  
    11= Simcpu32 =
    22
    3 = CPU32 Simulator =
     3
     4{{Infobox BSP
     5
     6|BSP_name     = CPU32 Simulator
     7|Manufacturer = ASH WARE MtDt
     8|Board_URL       = http://www.phaedsys.com/principals/ashware/ashcpu.html
     9|Architecture  = M68K
     10|CPU_model    = CPU32
     11|Simulator = TPU/CPU32 System Simulator
     12|Aliases  =  SIMCPU32   
     13|RAM     = RAM Unspecified
     14|NVMEM = Unspecified
     15|Serial Ports = 2 serial ports
     16|Video  =  Video unspecified
     17}}= CPU32 Simulator =
    418
    519A CPU32 simulation engine under ASH WARE's MtDt simulation framework.