Changes between Version 7 and Version 8 of TBR/BSP/SPARC_Instruction_Simulator_(sis)


Ignore:
Timestamp:
Nov 9, 2017, 7:02:27 AM (2 years ago)
Author:
Sebastian Huber
Comment:

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  • TBR/BSP/SPARC_Instruction_Simulator_(sis)

    v7 v8  
    2929This is a variant of the [wiki:TBR/BSP/Erc32 Erc32] BSP which runs on the SPARC ERC32 Simulator (SIS) in gdb.  It has special code enabled which is required on the simulator but not on real hardware.
    3030
    31 '''NOTE:''' Prior to October 2005, this variant did not exist.  As a compromise between users who wanted all code not needed on fielded [wiki:TBR/BSP/Erc32 Erc32] hardware and those who wanted RTEMS to continue to run on the simulator built into gdb, this variant was created. This BSP variant was obsoleted in October 2016 (applicable to RTEMS 4.12+) because the erc32 BSP now works correctly on the gdb simulator.
     31'''NOTE:''' Prior to October 2005, this variant did not exist.  As a compromise between users who wanted all code not needed on fielded [wiki:TBR/BSP/Erc32 Erc32] hardware and those who wanted RTEMS to continue to run on the simulator built into gdb, this variant was created. This BSP variant was obsoleted in October 2016 (applicable to RTEMS 5+) because the erc32 BSP now works correctly on the gdb simulator.
    3232
    3333 = Test Reports =