wiki:TBR/BSP/Rbtx4938

Version 6 (modified by Clarkg, on 11/28/10 at 04:00:33) (diff)

Added info box.

Rbtx4938

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| header1 = | label1 = Board Name | data1 = rbtx4938 | label2 = Manufacturer | data2 = Toshiba

| label3 = Reference | data3 = http://www.semicon.toshiba.co.jp/eng/product/micro/selection/tx49family/selection/index.html

| label4 = Architecture | data4 = 64-bit | label5 = CPU Model | data5 = TX49/H3

| label6 = Monitor | data6 = {{#if: Monitor| | Monitor | }}

| label7 = Runs on Simulator? | data7 = {{#if: Simulator| | Simulator | No. }}

| label10 = Aliases | data10 = {{#if: Aliases| | Aliases | }}

| label15 = RAM | data15 = {{#if: RAM| | RAM | RAM Unspecified. }} | label16 = Non-volatile Memory | data16 = {{#if: NVMEM| | NVMEM | Non-volatile memory unspecified. }}

| label20 = Serial Ports | data20 = {{#if: Serial| | Serial |Serial Ports Unspecified. }}

| label21 = NICs | data21 = {{#if: NICs| | NICs |NICs Unspecified. }}

| label21 = Video | data21 = {{#if: Video| | Video |Video Unspecified. }}

| label30 = Other | data30 = {{#if: Other| | Other | }}

}}

The RBTX4938 BSP is for a Toshiba evalutation board for the TX4938. The TX4938 is a system on chip with a MIPS R4000 class processor.

TX4938 Features:

  • Toshiba TX49/H3 Core
  • 333 MHz Max. Operating Frequency
  • On-chip IEEE754-compliant single/double precision FPU
  • Selectable Little Endian or Big Endian mode
  • 64 bit data bus
  • SDRAM Controller (4 channels)
  • DMA Controller (8 channels)
  • PCI Controller
  • Ethernet Controller (2 channels)
  • NAND Flash Memory Controller
  • Serial Peripheral Interface (SPI)
  • On-Chip SRAM (2 Kbytes)
  • Serial I/O port (2 channels)
  • Timer/Counter? (3 channels)
  • Parallel I/O Port (Max. 16 bits)
  • AC-Link Controller
  • Interrupt Controller