Changes between Version 9 and Version 10 of TBR/BSP/Rad750


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Timestamp:
Jan 20, 2011, 7:20:41 PM (9 years ago)
Author:
JoelSherrill
Comment:

/* Overview */ Add bullet list

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  • TBR/BSP/Rad750

    v9 v10  
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    32 The BAE Systems RAD750 Single Board Computer contains a RAD750 PowerPC cpu and a Power PCI intelligent bridge with peripherals.  This bsp uses a large amount of shared functionality since the this cpu is a hardened version of the the PowerPC 750, the Power PCI contains a ns16550 compatible UART, and the Power PCI appears to be PReP compliant.  At this time there are four supported configurations across two boards.  These bsps may be selected using the "rad750_3u" and "rad750_3u_debug" for support of the RAD750 3U board and the "rad750_6u" and "rad750_6u_debug" for support the RAD750 6U board.
     32The BAE Systems RAD750 Single Board Computer contains a RAD750 PowerPC cpu and a Power PCI intelligent bridge with peripherals.  This bsp uses a large amount of shared functionality since the this cpu is a hardened version of the the PowerPC 750, the Power PCI contains a ns16550 compatible UART, and the Power PCI appears to be PReP compliant.  At this time there are four supported configurations across two boards to allow building for 3U or 6U in production and debug configurations.  The debug configurations are built with options which make it possible to debug using the Corelis JTAG emulator.  The following lists the BSP variants:
     33
     34 *  rad750_3u - 3U board, production build
     35 *  rad750_6u - 6U board, production build
     36 *  rad750_3u_debug - 3U board, debug build
     37 *  rad750_6u_debug - 6U board, debug build
     38
     39The production build has XXX
     40
     41The debug build has XXX
    3342= Board Setup =
    3443