wiki:TBR/BSP/Psim

Version 73 (modified by Nedelin, on 12/29/10 at 16:58:16) (diff)

Psim

{{Infobox BSP |BSP_name = Power PC |Manufacturer = IBM |Board_URL = http://www.alphaworks.ibm.com/tech/systemsim970 |image = PPC.jpg |Architecture = RISC architecture |CPU_model = IBM PowerPC 600, PowerPC 7xx, PowerPC 970 and other PowerPC families. |Simulator = YES |Aliases = No |NICs = one. NIC part name. }}

Overview

PSIM is a program written in extended ANSI-C that emulates the Instruction Set Architecture of the PowerPC microprocessor family. It is freely available in source code form under the terms of the GNU General Public License (version 2 or later).

How does it work?

Written in C, a significant part of the Full-System Simulator's simulation capability is directly attributed to its TSIM component. Developed as a robust, high-performance alternative to conventional process and thread programming, TSIM is a light-weight, multi-tasking scheduling framework that provides a complete set of facilities for creating and scheduling threads, manipulating time delays, and applying a variety of inter-thread communication policies and mechanisms to simulation events. In TSIM's multi-threaded approach, individually-schedulable threads are created to simulate a component or collection of components. If a thread must defer processing, it requests to be blocked and continues execution when awakened. Any local (stack) state is preserved in order to mitigate the necessity for allocating areas for saving and restoring this state. TSIM threads are non-preemptive; they block only on well-defined events. TSIM simplifies access to shared data that must otherwise be serialized in order to guarantee correct behavior. Each thread has an associated priority. Scheduling and resource allocations are all "first-come, first-served" (FCFS) within priority. TSIM also includes software components useful for modeling common hardware components such as gates, latches, and ports. This low-level simulation infrastructure is complemented with a host of additional features, such as integrated development and debugging tools, support for stand-alone and operating system boot, data collection and analysis frameworks, performance visualization, and tracing and logging capabilities that enable developers to realistically represent an entire system of equipment, devices, or subsystems and simulate not only the instructions executed by the processor core, but also its interactions with its surrounding system components. Additionally, the Full-System Simulator is capable of booting K42, IBM's research operating system, and rHype, the research hypervisor.

The publication The PowerPC Architecture: A specification for a new family of RISC processors </cite> describes the PowerPC Instruction Set Architecture has having three levels of compliance:

UEA - User Instruction Set Architecture "<cite>the registers, instructions, storage model, and execution model that are available to all application programs</cite>" VEA - Virtual Environment Architecture "<cite>the features of the architecture that permit application programs to create or modify code, to share data among programs in a multiprocessing system, and to optimize the performance of storage accesses</cite>" OEA - Operating Environment Architecture "<cite>the features of the architecture that permit operating systems to allocate and manage storage, to handle errors encountered by application programs, to support I/O devices, and to provide the other services expected of secure, modern, multiprocessor operating systems</cite>" PSIM, both implements all three levels of the <strong>PowerPC</strong> Instruction Set Architecture, and includes, for each level, a number of simulated run-time environments:

UEA <strong>PSIM</strong> can run static programs compiled for any of the following operating systems: <UL> <LI>NetBSD <LI>Solaris <LI>LINIX </UL> VEA Support for environmental features of the Instruction Set Architecture including: Symetric multi-processing Cache manipulation Time base registers OEA Details of the target <cite>PowerPC Platform</cite> being modeled can be specified including: firmware (Motorola BUG or OpenFirmware?) memory and I/O address maps attached devices interrupt controller (OpenPIC) configuration In addition, <strong>PSIM</strong>, to the execution unit level, models the performance of most of the current PowerPC implementations (contributed by Michael Meissner). This detailed performance monitoring (unlike many other simulators) resulting in only a relatively marginal reduction in the simulators performance.

This document, firstly explains how to build and run PSIM. It then goes on to discuss the details of the internals of this simulator.

The most recent formal release of PSIM is version 2.1. In addition to describing that release of PSIM, this document also describes extensions that have been proposed for a future release of the PSIM Architecture

Downloading and Executing

Installing PSIM

To build PSIM you will need the following:

gdb-4.16.tar.gz Available from your favorite GNU ftp site gcc GCC version two includes suport for long long (64bit integer) arrithemetic which PSIM uses. Hence it is recommended that you build PSIM using GCC.

Updates to GDB

From time to time, problems involving the integration of PSIM into gdb are found. While eventually each of these problems is resolved there can be periouds during which a local hack may be needed.

At the time of writing the following were outstanding:

ATTACH command

ftp://ftp.ci.com.au/pub/psim/gdb-4.15+attach.diff.gz

or ftp://cambridge.cygnus.com/pub/psim/gdb-4.15+attach.diff.gz PSIM, unlike the other simulators included with GDB, is able to load the description of a target machine (including the initial state of all processor registers) from a file. Unfortunatly GDB does not yet have a standard command that facilitates the use of this feature. Until such a command is added, the above patch (hack?) can be used to extend GDB's attach command so that it can be used to initialize the simulators configuration from a file. GDB insns, stalls and cycles pseudo registers

ftp://ftp.ci.com.au/pub/psim/gdb-4.16+count.diff.gz

or ftp://cambridge.cygnus.com/pub/psim/gdb-4.16+count.diff.gz More recent versions of PSIM include partial support for the pseudo registers cycles, insns and stalls which are used to access profiling information. Before they can be used with gdb-4.16 (built with a more recent PSIM), the above patch should be applied. Reconize svr4 target

ftp://ftp.ci.com.au/pub/psim/gdb-4.16+svr4.diff.gz

or ftp://cambridge.cygnus.com/pub/psim/gdb-4.16+svr4.diff.gz This patch to gdb's configuration files adds additional targets for which PSIM will be built.

Using PSIM from within GDB

If you built PSIM with gdb then the following is a quick start tutorial.

At present GDB, if configured big-endian (say) unlike PSIM, does not support the debugging of little endian binaries. If you find that your program won't run at all, make certain that GDB and your program's endianness match.

The most important thing is that before you can run the simulator you must enable it. For the simulator, gdb is started like any program:

$ powerpc-unknown-eabi-gdb psim-test/uea/envp.be

Next the simulator is enabled. The command target sim accepts the same options as can be specified on the PSIM command line.

(gdb) target sim

To trace the communication between psim and gdb specify `target sim -t gdb'. Once enabled, the binary needs to be loaded, any breakpoints of interest set, and the program run:

(gdb) load (gdb) break main (gdb) run . . .

code on this board? What gdb setup? BDM, stub, etc?

References

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