Changes between Version 8 and Version 9 of TBR/BSP/Psim


Ignore:
Timestamp:
12/02/10 18:22:46 (13 years ago)
Author:
E.begov
Comment:

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  • TBR/BSP/Psim

    v8 v9  
    1616|Board_URL    = http:/manufacturer.com/ExampleBoard
    1717|Architecture = Architecture
    18 |CPU_model    = MVME5500
     18|CPU_model    = MPC7455
    1919|Monitor      = uBoot, uMon
    2020|Simulator    = Yes. [wiki:Developer/Simulators/SkyEye  Skyeye]
    2121|Aliases      = Any RTEMS BSP Aliases?
    22 |RAM          = XXX MB
    23 |NVMEM        = 32 MB Flash, 16 KB EEPROM
     22|RAM          = 512 MB
     23|NVMEM        = 256KB of on-chip L2 cache and 2MB of L3 cache
    2424|Serial       = one. UART part name.
    2525|NICs         = one. NIC part name.