Changes between Version 65 and Version 66 of TBR/BSP/Psim


Ignore:
Timestamp:
12/18/10 01:00:44 (13 years ago)
Author:
E.begov
Comment:

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  • TBR/BSP/Psim

    v65 v66  
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    31 Describe the board here.  Include links to manuals, brochures, etc.
     31PSIM is a program written in extended ANSI-C that emulates the Instruction Set Architecture of the PowerPC microprocessor family. It is freely available in source code form under the terms of the GNU General Public License (version 2 or later).
     32
     33The publication The PowerPC Architecture: A specification for a new family of RISC processors </cite> describes the PowerPC Instruction Set Architecture has having three levels of compliance:
     34
     35UEA - User Instruction Set Architecture "<cite>the registers, instructions, storage model, and execution model that are available to all application programs</cite>"
     36VEA - Virtual Environment Architecture "<cite>the features of the architecture that permit application programs to create or modify code, to share data among programs in a multiprocessing system, and to optimize the performance of storage accesses</cite>"
     37OEA - Operating Environment Architecture "<cite>the features of the architecture that permit operating systems to allocate and manage storage, to handle errors encountered by application programs, to support I/O devices, and to provide the other services expected of secure, modern, multiprocessor operating systems</cite>"
     38PSIM, both implements all three levels of the <strong>PowerPC</strong> Instruction Set Architecture, and includes, for each level, a number of simulated run-time environments:
     39
     40UEA <strong>PSIM</strong> can run static programs compiled for any of the following operating systems: <UL> <LI>NetBSD <LI>Solaris <LI>LINIX </UL>
     41VEA Support for environmental features of the Instruction Set Architecture including:
     42Symetric multi-processing
     43Cache manipulation
     44Time base registers
     45OEA Details of the target <cite>PowerPC Platform</cite> being modeled can be specified including:
     46firmware (Motorola BUG or OpenFirmware)
     47memory and I/O address maps
     48attached devices
     49interrupt controller (OpenPIC) configuration
     50In addition, <strong>PSIM</strong>, to the execution unit level, models the performance of most of the current PowerPC implementations (contributed by Michael Meissner). This detailed performance monitoring (unlike many other simulators) resulting in only a relatively marginal reduction in the simulators performance.
     51
     52This document, firstly explains how to build and run PSIM. It then goes on to discuss the details of the internals of this simulator.
     53
     54The most recent formal release of PSIM is version 2.1. In addition to describing that release of PSIM, this document also describes extensions that have been proposed for a future release of the PSIM Architecture
    3255= Board Setup =
    3356