Changes between Version 63 and Version 64 of TBR/BSP/Psim


Ignore:
Timestamp:
12/08/10 17:43:17 (13 years ago)
Author:
E.begov
Comment:

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  • TBR/BSP/Psim

    v63 v64  
    4949PMC mode is backwards compatible with the MVME5100 and is
    5050accomplished by configuring the on-board jumpers.
    51 = Architecture =
    52 
    53 The publication The PowerPC Architecture: A specification for a new family of RISC processors describes the PowerPC Instruction Set Architecture has having three levels of compliance:
    54 
    55 '''UEA''' - User Instruction Set Architecture
    56 ``the registers, instructions, storage model, and execution model that are available to all application programs''
    57 
    58 '''VEA''' - Virtual Environment Architecture
    59 ``the features of the architecture that permit application programs to create or modify code, to share data among programs in a multiprocessing system, and to optimize the performance of storage accesses''
    60 
    61 '''OEA''' - Operating Environment Architecture
    62 ``the features of the architecture that permit operating systems to allocate and manage storage, to handle errors encountered by application programs, to support I/O devices, and to provide the other services expected of secure, modern, multiprocessor operating systems''
     51
    6352
    6453= Specifications =
     54
    6555
    6656PSIM, both implements all three levels of the PowerPC Instruction Set Architecture, and includes, for each level, a number of simulated run-time environments:
     
    8373In addition, PSIM, to the execution unit level, models the performance of most of the current PowerPC implementations (contributed by Michael Meissner). This detailed performance monitoring (unlike many other simulators) resulting in only a relatively marginal reduction in the simulators performance.
    8474
     75 * Architecture
     76
     77The publication The PowerPC Architecture: A specification for a new family of RISC processors describes the PowerPC Instruction Set Architecture has having three levels of compliance:
     78
     79'''UEA''' - User Instruction Set Architecture
     80``the registers, instructions, storage model, and execution model that are available to all application programs''
     81
     82'''VEA''' - Virtual Environment Architecture
     83``the features of the architecture that permit application programs to create or modify code, to share data among programs in a multiprocessing system, and to optimize the performance of storage accesses''
     84
     85'''OEA''' - Operating Environment Architecture
     86``the features of the architecture that permit operating systems to allocate and manage storage, to handle errors encountered by application programs, to support I/O devices, and to provide the other services expected of secure, modern, multiprocessor operating systems''
     87
     88
     89
    8590'''Processor'''
    8691 * Microprocessor: MPC7455