Changes between Version 9 and Version 10 of TBR/BSP/Psim

Timestamp:

12/02/10 18:28:52 (14 years ago)

Author:

E.begov

Comment:

TBR/BSP/Psim

@@ -11 +11 @@
 {{Infobox BSP
 |BSP_name     = Motorola (now Emerson)
-|Manufacturer = Motorola
+|Microprocessor: MPC7455
 |image        = ADSP BF537 STAMP color dark.jpg
 |caption      = optional image caption
 |Board_URL    = http:/manufacturer.com/ExampleBoard
-|Architecture = Architecture
-|CPU_model    = MPC7455
-|Monitor      = uBoot, uMon
-|Simulator    = Yes. [wiki:Developer/Simulators/SkyEye  Skyeye]
-|Aliases      = Any RTEMS BSP Aliases?
-|RAM          = 512 MB
-|NVMEM        = 256KB of on-chip L2 cache and 2MB of L3 cache
-|Serial       = one. UART part name.
-|NICs         = one. NIC part name.
+|Clock Frequency: 1 GHz
+ On-chip L1 Cache (I/D): 32KB/32KB
+ On-chip L2 Cache (I/D): 256KB/256KB
+ L3 Cache: 2MB
+
 |Other        = anything else you need to say
 }}