wiki:TBR/BSP/Ppcn_60x

Ppcn 60x

Infobox BSP

BSP_name Ppcn 60x
Manufacturer Radstone
image Ppc2a.png
caption PPC2A
Board_URL http://hallaweb.jlab.org/compton/Documentation/Jlab/PowerPC/ppc2a.pdf
Architecture PReP
CPU_model PowerPC 603 / 604 / 740
Monitor Silver Chip or DINK32
Simulator N/A
Aliases No
RAM 32 to 256 MB of DRAM
NVMEM 9 MB Flash (1 MB system / 8 MB user)
Serial 4 x Serial Ports
NICs 10BaseT or 10Base5 Ethernet
Other 1 PMC Expansion Slot

Overview

The PPC2A COTS 6U VME Single Board Computers offer market leading performance in both air cooled and conduction cooled form factor, combined with the same rich feature set of the PowerPC Reference Platform (PReP) architecture Radstone introduced on PPC1 in 1995.

PPC2A supports a wide range of G3 PowerPC processors within the standard PReP architecture. This means you can choose the CPU that fits your performance and power budget requirements while maintaining form, fit and function compatibility with previous PPC2 system designs.

PPC2A supports 32 or 64MBytes of EDO DRAM on-board, with expansion to 256MBytes total by adding the PMCC2 6U daughter board.

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Board Setup

If there are special jumper or ROM monitor settings, describe them.

Downloading and Executing

Describe the download procedure.

Debugging

How do you debug code on this board? What gdb setup? BDM, stub, etc?

Test Reports

{{Test Report |Version = CVS head |Date = DATE |User = User:WhoTestedThis? |Report = reports that something happened. }}

References

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Last modified on Nov 9, 2018 at 4:02:08 AM Last modified on Nov 9, 2018, 4:02:08 AM