Changes between Version 7 and Version 8 of TBR/BSP/Ppc405ex


Ignore:
Timestamp:
Jan 12, 2009, 7:37:17 AM (11 years ago)
Author:
Mhamel
Comment:

/* Downloading and Executing */

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  • TBR/BSP/Ppc405ex

    v7 v8  
    3030
    3131
    32 This BDM is designed to be downloaded directly into DRAM via a Macraigor OCDemon BDM device. This means that the DRAM controller has to be set up first so that we have some working RAM to write to. The following gdb script does this; other loading methods need to prefix equivalent code to dlentry.S
     32This BDM is designed to be downloaded directly into DRAM via a Macraigor OCDemon BDM device. This means that the DRAM controller has to be set up first so that we have some working RAM to write to. The following gdbinit script does this; other loading methods need to prefix equivalent code to dlentry.S
    3333
    3434{{{
     35echo Setting up gdb for AMCC PPC405EXr Haleakala.\n
     36
    3537# Common gdb setup for PowerPC CPUs
    3638set complaints 1
     
    4244dir .
    4345
     46# Set GDB to use 1024 bytes packets when downloading. This
     47# is optional but reduces load image download times
     48set remote memory-write-packet-size 1024
     49set remote memory-write-packet-size fixed
     50
     51# Define some useful macros
     52
     53# Test memory access using 32-bit operations
     54define memtest32
     55    echo Testing memory (32bit): $arg0 \t
     56        set $next = ($arg0 + 4)
     57        set {unsigned long} ($arg0) = 0x89abcdef
     58    set {unsigned long} ($next) = 0x01234567
     59    if ({unsigned long} ($arg0)) == 0x89abcdef          \
     60          && ({unsigned long} ($next)) == 0x01234567
     61        echo Success.\n
     62    else
     63        if ({unsigned long} ($arg0)) == 0x01234567              \
     64                  && ({unsigned long} ($next)) == 0x89abcdef
     65            echo Failure (read/write long word lanes are reversed.)\n
     66        else
     67            echo Failure.\n
     68        end
     69    end
     70end
     71
    4472define sdram_set
    4573        monitor dcr 0x10=$arg0
    4674        monitor dcr 0x11=$arg1
    4775end
    48 
    4976
    5077define sdram_init
     
    113140end
    114141
    115 # CONNECT TO TARGET : this is the IP address of the PC running Macraigor software
    116 # with USB2Sprite connected to running target
    117 # Command to Cygwin on the PC is:
     142#------------------------ Startup and debug  -----------------------------
     143# 10.0.1.2 is the IP address of a PC running the Macraigor OCDRemote software
     144# with a USB2Sprite connected to Haleakala board.
     145# The Cygwin command used to start debugging services on the PC is:
    118146# $ /usr/local/bin/ocdremote -c PPC405 -d USB
    119147
    120148target remote tcp:10.0.1.2:8888
    121149
    122 # Reset Target board
     150# Reset the target board
    123151monitor reset
    124152flushregs
    125153
    126 # Initialise SDRAM controller so we have RAM to work with
     154# Initialise the SDRAM controller so we have RAM to work with
    127155sdram_init
    128156
    129 # Load the file and run to start point
    130 load o-optimize/netdemo.exe
    131 symbol-file o-optimize/netdemo.exe
     157# Check its working
     158memtest32
     159
     160# Load an executable; "c" to run
     161load test.exe
     162symbol-file test.exe
    132163}}}
    133164= Debugging =