Changes between Version 6 and Version 7 of TBR/BSP/Phycore_mpc5554


Ignore:
Timestamp:
11/08/18 22:09:43 (5 years ago)
Author:
shashvat jain
Comment:

Fixed Infobox

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  • TBR/BSP/Phycore_mpc5554

    v6 v7  
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    4 {{Infobox BSP
    5 |BSP_name     = phyCORE-MPC5554
    6 |Manufacturer = Chip: Freescale; Board: PHYTEC
    7 |image        = PhyCORE.jpg
    8 |CPU_model    = MPC5554 (e200z6), up to 132 MHz CPU speed
    9 |RAM          = Chip: 64 kByte SRAM with 32 kByte capable of battery buffering; Board: Up to 16MB SRAM
    10 |NVMEM        =Chip: 2MB flash; Board: Up to 8MB flash
    11 |Architecture = PowerPC
    12 |Peripherals = Chip: 2 eTPU, 4 dSPI, 3 flexCAN, 2 12-bit ADC with 40 inputs; Board: SMC ethernet, Lattice FPGA
    13 |Serial Ports = 2 eSCI
    14 |Board_URL    = http://www.phytec.com/products/som/PowerPC/phyCORE-MPC5554.html
     4== Infobox BSP ==
    155
    16 }}
     6||'''BSP_name'''     ||phyCORE-MPC5554||
     7||'''Manufacturer''' ||Chip: Freescale; Board: PHYTEC||
     8||'''image'''        ||PhyCORE.jpg||
     9||'''CPU_model'''    ||MPC5554 (e200z6), up to 132 MHz CPU speed||
     10||'''RAM'''          ||Chip: 64 kByte SRAM with 32 kByte capable of battery buffering; Board: Up to 16MB SRAM||
     11||'''NVMEM'''        ||Chip: 2MB flash; Board: Up to 8MB flash||
     12||'''Architecture''' ||PowerPC||
     13||'''Peripherals'''  ||Chip: 2 eTPU, 4 dSPI, 3 flexCAN, 2 12-bit ADC with 40 inputs; Board: SMC ethernet, Lattice FPGA||
     14||'''Serial Ports''' ||2 eSCI||
     15||'''Board_URL'''    ||[http://www.phytec.com/products/som/PowerPC/phyCORE-MPC5554.html]||
     16
     17
    1718The phyCORE-MPC5554 belongs to PHYTEC’s phyCORE Single Board Computer module family. The phyCORE SBCs represent the continuous development of PHYTEC Single Board Computer technology. Like its mini-, micro- and nanoMODUL predecessors, the phyCORE boards integrate all core  elements of a microcontroller system on a sub-miniature board and are designed in a manner that ensures their easy expansion and  embedding in peripheral hardware developments. = Overview =
    1819