Changes between Version 2 and Version 3 of TBR/BSP/Orp


Ignore:
Timestamp:
01/12/13 07:18:45 (11 years ago)
Author:
.ayush10297
Comment:

Legend:

Unmodified
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  • TBR/BSP/Orp

    v2 v3  
    66|Manufacturer = OpenCores
    77|image        = ADSP BF537 STAMP color dark.jpg
    8 |Board_URL    = http://opencores.org/or1k/OR1K:Community_Portal
     8|Board_URL    = http://opencores.org/or1k/OR1200_OpenRISC_Processor
    99|Architecture = OpenRISC
    1010|CPU_model    = 32-bit Scalar (Harvard microarchitecture)
    1111|Monitor      = uBoot, uMon
    12 |Simulator    = Yes. [wiki:Developer/Simulators/SkyEye  Skyeye]
     12|Simulator    = Yes. [wiki:Developer/Simulators/SkyEye  Skyeye] FPGA or ASIC
    1313|Aliases      = none
    1414|RAM          = Not Found