Changes between Version 28 and Version 29 of TBR/BSP/Nios2_iss


Ignore:
Timestamp:
Dec 18, 2011, 7:41:04 PM (8 years ago)
Author:
Ivaylo
Comment:

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  • TBR/BSP/Nios2_iss

    v28 v29  
    66|Manufacturer = Altera
    77|image = Nios2.jpg
    8 |Board_URL = my pdf
    9 |NVRAM        = 32 KB NVRAM
    10 |Architecture = PowerPc
    11 |RAM          = 4MB DRAM
     8|Board_URL = http://www.altera.com/literature/ds/ds_nios2_3c25_lcd.pdf
     9|NVRAM        =
     10|Architecture =
     11|RAM          =
    1212|NVMEM = One bank 32-bit Flash (2MB, 4MB, or 8MB)
    13 |CPU_model    = MPC860 40MHZ
    14 |Serial       = Two additional EIA-232-D serial ports
     13|CPU_model    =
     14|Serial       =
    1515|Other =   
    1616}}