Changes between Version 23 and Version 24 of TBR/BSP/Nios2_iss


Ignore:
Timestamp:
Dec 18, 2011, 7:27:02 PM (8 years ago)
Author:
Ivaylo
Comment:

/* Memory */

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  • TBR/BSP/Nios2_iss

    v23 v24  
    6363|[wiki:File:sdram1.png center]
    6464|}
     65
     66'''SD/MMC SPI'''
     67
     68The SD/MMC SPI core connects to standard multimedia card (MMC) and secure digital (SD) flash based memory devices. The MMC and SD card are universal low cost data storage memories. The SD/MMC SPI core is available from El Camino GmbH in encrypted format, for evaluation purposes. The SD/MMC SPI core also comes with low-level driver routines to access the MMC and SD devices.
     69Features:
     70 *  2,400 KBytes per second read and 2,400 KBytes per second write performance
     71 *  Supports MMC and SD in SPI mode
     72 *  Variable data rate up to 25 Mbps (SD only) and 20 Mbps (SD/MMC)
     73 *  Hardware assisted CRC calculation
     74 *  Low level drivers included
     75{|align="center"
     76|-
     77|[wiki:File:spi1.png center]
     78|}
    6579= Block diagram =
    6680