Changes between Version 20 and Version 21 of TBR/BSP/Nios2_iss

Timestamp:

12/18/11 19:20:23 (12 years ago)

Author:

Ivaylo

Comment:

/* Memory */

TBR/BSP/Nios2_iss

@@ -54 +54 @@
 
 The Altera CFI-compliant flash memory controller core controls an external flash device (Intel). This flash device stores both application program code and FPGA configuration data. With 16 MByte capacity, it is possible to store multiple configuration images in flash memory and configure the FPGA with one of the images.
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