Changes between Version 17 and Version 18 of TBR/BSP/Nios2_iss


Ignore:
Timestamp:
12/18/11 19:17:53 (12 years ago)
Author:
Ivaylo
Comment:

/* Memory */

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  • TBR/BSP/Nios2_iss

    v17 v18  
    5050= Memory =
    5151
     52
     53'''CFI Flash Interface'''
     54The Altera CFI-compliant flash memory controller core controls an external flash device (Intel). This flash device stores both application program code and FPGA configuration data. With 16 MByte capacity, it is possible to store multiple configuration images in flash memory and configure the FPGA with one of the images.
    5255= Block diagram =
    5356