wiki:TBR/BSP/Niagara
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Version 3 (modified by Gedare, on 05/12/10 at 22:54:28) (diff)

/* Overview */

Niagara

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{{Infobox BSP |BSP_name = OpenSPARC T1 |Manufacturer = Sun Microsystems / OpenSparc? |image = ultrasparct1.jpg |caption = UltraSPARC T1 |Board_URL = http://www.opensparc.net/opensparc-t1/index.html |Architecture = SPARC-V9 |CPU_model = Niagara |Monitor = |Simulator = Yes. Simics, M5 |Aliases = |RAM = XXX MB |NVMEM = |Serial = |NICs = |Other = }}

Overview

Describe the board here. Include links to manuals, brochures, etc.

Niagara is a 64-bit SPARC processor conforming to the UltraSPARC Architecture 2005 specification of SPARC v9, which will be referred to as sun4v. Architectures conforming to the original SPARC v9 will be referred to as sun4u, which in this discussion also includes the Joint Programming Specification (JPS) compliant processors.

Manuals

[http://www.opensparc.net/cgi-bin/goto.php?w=http://opensparc-t1.sunsource.net/specs/UA2005-current-draft-P-EXT.pdf UltraSPARC Architecture 2005 Specification]

UltraSPARC T1 supplement to UltraSPARC Architecture 2005 Specification

Register ABI Compliance

Board Setup

If there are special jumper or ROM monitor settings, describe them.

Downloading and Executing

Describe the download procedure.

Debugging

How do you debug code on this board? What gdb setup? BDM, stub, etc?

=Test Reports=

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