wiki:TBR/BSP/Mvme147s

Mvme147s

{{Infobox BSP |BSP_name = mvme147s |Manufacturer = Motorola Computer Group now Emerson Network Power |image = MVME147_L_188.jpg |Board_URL = http://www.mvme.com/mvme147s.html |Architecture = M68K |CPU_model = MC68030 |Serial = four EIA-232-D Serial Communications Ports |Simulator = No |NVMEM = 2KB static RAM |RAM = 4-32 MB }}

Overview

  • 16, 25, or 33.33 MHz MC68030 enhanced 32-bit microprocessor
  • 16, 25, or 33.33 MHz MC68882 floating-point coprocessor
  • 4, 8, 16, or 32MB of shared DRAM, with programmable parity
  • 4K x 8 SRAM and time-of-day clock with battery backup
  • Four 28/32-pin ROM/PROM/EPROM/EEPROM sockets, 16 bits wide
  • A32/D32 VMEbus master/slave interface with system controller function
  • Four EIA-232-D serial communications ports
  • Centronics compatible printer port
  • Two 16-bit timers and watchdog timer
  • SCSI bus interface with DMA
  • Ethernet transceiver interface
  • 4-level requester, 7-level interrupter, and 7-level interrupt handler for VMEbus
  • On-board debugger and diagnostic firmware

The MVME 147s is extremely similar to the Mvme147. The main difference between them is that the 147s also has only 2KB of static RAM while the 147 has 4KB.

Another small difference between them is the time-of-day clock. The MVME147s has a Mostek MK48T02 while the MVME147 has an M48T18.

The MVME147S is a double-high VMEmodule and is best utilized in a 32-bit VMEbus system with both P1 and P2 backplanes. The module has high functionality with large onboard shared RAM, serial ports, and Centronics printer port. The module provides a SCSI bus controller with DMA, floating-point coprocessor, tick timer, watchdog timer, and time-of-day clock/calendar with battery backup, 2KB of static RAM with battery backup, four ROM sockets, and A32/D32 VMEbus interface with system controller functions are also provided. The MVME147S can be operated as part of a VMEbus system with other VMEmodules such as RAM modules, CPU modules, graphics modules, and analog I/O modules.

The manual can be found at www.ing.iac.es/~docs/external/vme/147s_d3.pdf

Board Setup

To select the desired configuration and ensure proper operation of the MVME147S module, certain changes may be made before installation. These changes are made through jumper arrangements on the headers. The module has been factory tested and is shipped with factory-installed jumper configurations. The module is operational with the factory-installed jumpers. The module is configured to provide the system functions required for a VMEbus system. It is necessary to make changes in the jumper arrangements for the following conditions:

System controller select (J3) Factory use only (J5, J6) ROM configuration select (J1, J2) Serial port 4 clock configuration select (J8, J9)

See manual for further information

Downloading and Executing

There are various ways to enter a user program into system memory for execution. One way is to create the program using the Memory Modify (MM) command with the assembler/disassembler option. You enter the program one source line at a time. After each source line is entered, it is assembled and the object code loads into memory. Refer to the MVME147 BUG 147Bug Debugging Package User's Manual for complete details of the 147Bug Assembler/Disassembler?. Another way to enter a program is to download an object file from a host system. The program must be in S-record format (described in the MVME147BUG 147Bug Debugging Package User's Manual) and may have been assembled or compiled on the host system. Alternately, the program may have been previously created using the 147Bug MM command as outlined above and stored to the host using the Dump (DU) command. A communication link must exist between the host system and the MVME147. The file is downloaded from the host to MVME147 memory by the Load (LO) command.

Debugging

MVME147Bug package. Facilities are available for loading and executing user programs under complete operator control for system evaluation. See manual for further information

References

  • www.ing.iac.es/~docs/external/vme/147s_d3.pdf

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Last modified on Dec 8, 2010 at 1:30:30 PM Last modified on Dec 8, 2010, 1:30:30 PM