wiki:TBR/BSP/Mtx603e

Mtx603e

{{Infobox BSP |BSP_name = MTX603e |Manufacturer = Motorola |image = Mtxppc.png |caption = |Board_URL = References |Architecture = PowerPC RISC |CPU_model = MPC603e |Monitor = uBoot, uMon |Simulator = Yes. Skyeye |Aliases = MTX603 |RAM = 16MB-256MB |NVMEM = 1-8MB Flash |Serial = 4 x DTE ports (COM1 and COM2) |NICs = Ethernet DEC21143 10BaseT/100BaseTx |Other = LED-mezzanine/remote-reset connector }}

Overview

The MTX series motherboard consists of the MPC603e/604e processor, the Raven PCI Bridge and Interrupt Controller, the ECC Memory Controller Falcon chipset, 5M of Boot FLASH, ECC-protected DRAM, and a large set of I/O peripherals. The MTX will support single 603ev, single 604e processors, and dual 604e processors. In the dual processor configuration, the internal operating frequencies of the 604e’s are independently configurable. I/O peripheral devices on the PCI bus are: SCSI interface, Ethernet interface, two 64-bit PMC and one 64-bit PCI slot, or three 32-bit PCI slots.

Functions provided from the ISA bus are: two EIDE ports, a host mode P1284 parallel port, a peripheral mode P1284 parallel port, two async serial ports, two sync/async serial ports, a real time clock, and counters/timers. Rear panel connectors on the MTX motherboard include: a 6-pin circular DIN connector for the keyboard interface, a 6-pin circular DIN connector for the mouse interface, a 25-pin host mode parallel port connector, an RJ45 connector for 10/100BaseT connections, and a 15 pin connector for the AUI interface.

The MTX series can be populated with two IEEE1386.1 PCI Mezzanine Card (PMC) slots plus a 64-bit PCI slot, or with three 32-bit PCI slots. The 32-bit PCI slots support ATX standard I/O spacing. All slots use rear panel I/O. The 64-bit PCI slot supports a horizontal PCI card via a custom riser card. DRAM memory is added via DIMM sockets, and the serial presence detect (SPD) feature of the DIMM DRAMs is supported via the I2C bus controller.

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Board Setup

If there are special jumper or ROM monitor settings, describe them.

Jumper J36 is used to disable on-board SCSI terminators and to disable the firmware negotiation of UltraSCSI.

  • To disable on-board SCSI terminators connect a jumper from J36-2 to J36-1.
  • To disable firmware negotiation of UltraSCSI connect a jumper from J36-3 to J36-4

The MTX motherboard contains two banks of FLASH memory. Bank A consists of two soldered-in 8-bit wide, 2 megabyte deep 3.3V FLASH SMT devices and appears as FLASH Bank A (16 bits wide) to the Falcon chipset. A resistor select enables write protect for Bank A (default configuration is software write protect enabled), individual 64K byte blocks can be write protected by software. The entire Bank A memory can be write protected by removing the resistor jumper (R71) that supplies write power to the devices.

Bank B consists of two sockets for 8-bit wide +5.0 volt FLASH SMT devices and appears as FLASH Bank B (16 bits wide) to the Falcon chipset. The bank B sockets support a maximum 512K byte FLASH in each socket. Bank B contains the onboard debugger, PPCBug.

Downloading and Executing

Describe the download procedure.

Debugging

How do you debug code on this board? What gdb setup? BDM, stub, etc?

Test Reports

{{Test Report |Version = RTEMS Version |Date = Date |User = User |Report = reports that something happened. }}

References

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Last modified on Nov 27, 2010 at 5:45:35 AM Last modified on Nov 27, 2010, 5:45:35 AM