Version 8 (modified by Deivid, on 11/29/11 at 22:25:00) (diff) |
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M5484FireEngine
{{Infobox BSP |BSP_name = M5484 |Manufacturer = Fire Engine |image = |Board_URL = http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=M5484LITE |Architecture = Blackfin |CPU_model = bf537 |Simulator = Yes. Skyeye }}
- Limited superscalar V4 ColdFire? processor core
- Double-precision conforms to IEE-754 standard
- Controller Area Network (CAN) 2.0B Interface
- 32-bit double data rate (DDR) synchronous DRAM (SDRAM) controller
- 66–133 MHz operation
- Supports DDR and SDR DRAM
- Built-in initialization and refresh
- Up to four chip selects enabling up to one GB of external
- 32-Kbyte system SRAM
- Arbitration mechanism shares bandwidth between internal bus masters
- IrDA 1.1 interfaces
- Up to four programmable serial controllers (PSCs) each with separate 512-byte receive and transmit FIFOs for UART, USART, modem, codec
- Debug and test features
- ColdFire? background debug mode (BDM) port
- JTAG/ IEEE 1149.1 test access port
- Estimated power consumption
- Less than 1.5W (388 PBGA)