M5484FireEngine

{{Infobox BSP |BSP_name = genmcf548x |Manufacturer = Texas Instruments |image = ADSP BF537 STAMP color dark.jpg |Board_URL = ​http://www.freescale.com/files/32bit/doc/data_sheet/MCF5485EC.pdf |CPU_model = }}

​http://www.analog.com/en/embedded-processing-dsp/blackfin/bf537-stamp/processors/product.html

• Limited superscalar V4 ColdFire? processor core
• Double-precision conforms to IEE-754 standard
• Controller Area Network (CAN) 2.0B Interface
• 32-bit double data rate (DDR) synchronous DRAM

(SDRAM) controller – 66–133 MHz operation – Supports DDR and SDR DRAM – Built-in initialization and refresh – Up to four chip selects enabling up to one GB of external

• 32-Kbyte system SRAM

– Arbitration mechanism shares bandwidth between internal bus masters

• IrDA 1.1 interfaces
• Up to four programmable serial controllers (PSCs) each

with separate 512-byte receive and transmit FIFOs for UART, USART, modem, codec

• Debug and test features

– ColdFire? background debug mode (BDM) port – JTAG/ IEEE 1149.1 test access port

• Estimated power consumption

– Less than 1.5W (388 PBGA)