Changes between Version 3 and Version 4 of TBR/BSP/M5484FireEngine


Ignore:
Timestamp:
Nov 29, 2011, 9:08:46 PM (8 years ago)
Author:
JoelSherrill
Comment:

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  • TBR/BSP/M5484FireEngine

    v3 v4  
    1919}}
    2020
    21 
    22 
    23 http://pdf1.alldatasheet.com/datasheet-pdf/view/184676/FREESCALE/mcf5485.html
    24 
    2521 *  Limited superscalar V4 ColdFire processor core
    2622 *  Double-precision conforms to IEE-754 standard
    2723 *  Controller Area Network (CAN) 2.0B Interface
    28  *  32-bit double data rate (DDR) synchronous DRAM
    29 (SDRAM) controller
    30 – 66–133 MHz operation
    31 – Supports DDR and SDR DRAM
    32 – Built-in initialization and refresh
    33 – Up to four chip selects enabling up to one GB of external
     24 *  32-bit double data rate (DDR) synchronous DRAM (SDRAM) controller
     25  *  66–133 MHz operation
     26  *  Supports DDR and SDR DRAM
     27  *  Built-in initialization and refresh
     28  *  Up to four chip selects enabling up to one GB of external
    3429 *  32-Kbyte system SRAM
    35 – Arbitration mechanism shares bandwidth between
    36 internal bus masters
    37  *   IrDA 1.1 interfaces
    38  *  Up to four programmable serial controllers (PSCs) each
    39 with separate 512-byte receive and transmit FIFOs for
    40 UART, USART, modem, codec
     30  *  Arbitration mechanism shares bandwidth between internal bus masters
     31 *  IrDA 1.1 interfaces
     32 *  Up to four programmable serial controllers (PSCs) each with separate 512-byte receive and transmit FIFOs for UART, USART, modem, codec
    4133 *  Debug and test features
    42  ColdFire background debug mode (BDM) port
    43  JTAG/ IEEE 1149.1 test access port
     34  * ColdFire background debug mode (BDM) port
     35  * JTAG/ IEEE 1149.1 test access port
    4436 *  Estimated power consumption
    45 – Less than 1.5W (388 PBGA)
     37  *  Less than 1.5W (388 PBGA)
     38= References =
     39
     40 *  http://pdf1.alldatasheet.com/datasheet-pdf/view/184676/FREESCALE/mcf5485.html