| 1 | = M5484FireEngine = |
| 2 | |
| 3 | |
| 4 | {{Infobox BSP |
| 5 | |BSP_name = genmcf548x |
| 6 | |Manufacturer = Texas Instruments |
| 7 | |image = ADSP BF537 STAMP color dark.jpg |
| 8 | |Board_URL = http://www.freescale.com/files/32bit/doc/data_sheet/MCF5485EC.pdf |
| 9 | |CPU_model = |
| 10 | }} |
| 11 | |
| 12 | |
| 13 | http://www.analog.com/en/embedded-processing-dsp/blackfin/bf537-stamp/processors/product.html |
| 14 | |
| 15 | * Limited superscalar V4 ColdFire processor core |
| 16 | * Double-precision conforms to IEE-754 standard |
| 17 | * Controller Area Network (CAN) 2.0B Interface |
| 18 | * 32-bit double data rate (DDR) synchronous DRAM |
| 19 | (SDRAM) controller |
| 20 | – 66–133 MHz operation |
| 21 | – Supports DDR and SDR DRAM |
| 22 | – Built-in initialization and refresh |
| 23 | – Up to four chip selects enabling up to one GB of external |
| 24 | * 32-Kbyte system SRAM |
| 25 | – Arbitration mechanism shares bandwidth between |
| 26 | internal bus masters |
| 27 | * IrDA 1.1 interfaces |
| 28 | * Up to four programmable serial controllers (PSCs) each |
| 29 | with separate 512-byte receive and transmit FIFOs for |
| 30 | UART, USART, modem, codec |
| 31 | * Debug and test features |
| 32 | – ColdFire background debug mode (BDM) port |
| 33 | – JTAG/ IEEE 1149.1 test access port |
| 34 | * Estimated power consumption |
| 35 | – Less than 1.5W (388 PBGA) |