wiki:TBR/BSP/Lm32_evr

Lm32 evr

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Infobox BSP

BSP_name lm32_evr
Manufacturer Micro-Research Finland Oy
image lm32_evr.png
caption lm32_evr
Board_URL http://www.mrf.fi/index.php?option=com_content&task=view&id=60&Itemid=63
Architecture lm32
CPU_model lm32
Monitor Unknown
Simulator Yes. Qemu
Aliases No Aliases
RAM 64 MB
NVMEM 4 MB Serial Flash, unknown KB EEPROM
Serial one. UART part name.
NICs one. 10/100
Other can be instanced on any Lattice FPGA

Overview

This is the configuration of the custom board developed by http://www.mrf.fi.

  • SFP transceiver for event link
  • Lattice ECP2M-35 FPGA with high speed serial link
  • 10/100 ethernet
  • 64 Mbytes DDR2 memory
  • 2 × 16 Mbits serial flash
    • FPGA configuration
    • Software (e.g. RTEMS)
  • EEPROM for
    • CompactRIO compliance
    • Store Ethernet MAC address
  • 5 to 35 VDC power supply input
  • 71 mm x 88 mm x 23 mm
  • I/O through DSUB15

Board Setup

If there are special jumper or ROM monitor settings, describe them.

Downloading and Executing

Describe the download procedure.

Debugging

How do you debug code on this board? What gdb setup? BDM, stub, etc?

Test Reports

{{Test Report |Version = CVS head |Date = DATE |User = User:WhoTestedThis? |Report = reports that something happened. }}

References

  • TBD

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Last modified on Nov 7, 2018 at 10:15:14 AM Last modified on Nov 7, 2018, 10:15:14 AM