wiki:TBR/BSP/Leon3

Version 8 (modified by Daniel, on Sep 10, 2007 at 6:40:11 PM) (diff)

/* Test Reports */

Leon3

This BSP is for the LEON3 SPARC V8 processor developed by Gaisler Research. The LEON3 includes serial ports and timers on the CPU so one BSP can support many of the LEON3 boards. LEON3 is available as a synthesizable VHDL model, allowing custom implementations on FPGA and/or ASIC.

The BSP supports three network interfaces: the GRETH 10/100/1000, the Opencores Ethernet MAC and the LAN91C111 i/f.

  • Ethernet (GRETH 10/100/1000)
  • PCI, GRPCI
  • CAN, GRCAN
  • CAN, OC_CAN (Opencores CAN GRLIB wrapper)
  • 1553, 1553BRM
  • SpaceWire?, GRSPW
  • PCI drivers to RASTA, Companion Chip

Boards

The startup procedure for LEON BSPs is explained in SparcBSPStartup.

Test Reports

4.6.4: User:Jiri? reports that it runs fine on the TSIM simulatior, and boards from Pender

4.6.99.2: User::Jiri? reports that it runs fine on the TSIM simulator, and on boards from Pender

4.6.99.3: runs on GR-XC3S-1500 board - tested with networking (greth)

4.7.99.2: User:Daniel? Sep 5 2007, Tested GRETH 10/100, B1553BRM(on RASTA over PCI, on Companion Chip over PCI, direct), GRCAN(on RASTA over PCI), OC_CAN(on Companion Chip over PCI, direct)