Leon3

This BSP is for the ​LEON3 SPARC V8 processor developed by ​Gaisler Research. The LEON3 includes serial ports and timers on the CPU so one BSP can support many of the LEON3 boards. LEON3 is available as a synthesizable VHDL model, allowing custom implementations on FPGA and/or ASIC.

The BSP supports two network interfaces: the ​Opencores Ethernet MAC and the ​LAN91C111 i/f.

Boards

• ​GR-CPCI-AX2000 Compact PCI board from Pender Electronic Design
• ​LEON3 Development boards from Pender Electronic Design

The startup procedure for LEON BSPs is explained in SparcBSPStartup.

Test Reports

4.6.4: User:Jiri? reports that it runs fine on the ​TSIM simulatior, and boards from Pender

4.6.99.2: User::Jiri? reports that it runs fine on the ​TSIM simulator, and on boards from Pender

4.6.99.3: runs on GR-XC3S-1500 board - tested with networking (greth)