Version 5 (modified by Jerryneedell, on Nov 18, 2006 at 6:13:04 AM) (diff)


This BSP is for the LEON3 SPARC V8 processor developed by Gaisler Research. The LEON3 includes serial ports and timers on the CPU so one BSP can support many of the LEON3 boards. LEON3 is available as a synthesizable VHDL model, allowing custom implementations on FPGA and/or ASIC.

The BSP supports two network interfaces: the Opencores Ethernet MAC and the LAN91C111 i/f.


The startup procedure for LEON BSPs is explained in SparcBSPStartup.

Test Reports

4.6.4: User:Jiri? reports that it runs fine on the TSIM simulatior, and boards from Pender User::Jiri? reports that it runs fine on the TSIM simulator, and on boards from Pender runs on GR-XC3S-1500 board - tested with networking (greth)