| 59 | = SMP Support = |
| 60 | |
| 61 | The BSP supports RTEMS SMP. |
| 62 | |
| 63 | == Static Interrupt Affinity == |
| 64 | |
| 65 | CPU affinity can be assigned to individual interrupts. By default interrupts are processed by the boot CPU, |
| 66 | but this can be changed by defining the weakly linked table `const unsigned char LEON3_irq_to_cpu[32]` in the user program. |
| 67 | This makes it possible to specify which CPU a specific interrupt should be routed to. The array index is the interrupt to be |
| 68 | rerouted and the `array[INTERRUPT]` content is the CPU number relative to the boot CPU index that will be servicing the |
| 69 | interrupts from the IRQ source. |
| 70 | |
| 71 | == Selecting IRQ for Inter-processor Interrupts == |
| 72 | Inter-processor interrupts are used in the communication between CPUs. By default IRQ 14 is used, but on |
| 73 | some systems this can conflict with an IP core using the same IRQ. Defining the weakly linked variable |
| 74 | `const unsigned char LEON3_mp_irq` in the user program makes it possible to decide which IRQ should be |
| 75 | used instead, allowing the conflict to be avoided. |
| 76 | |