= LM3S6965 =


= Device Overview =

The heart of the EVB is a Stellaris LM3S6965 ARM Cortex-M3-based microcontroller. The LM3S6965 offers 256 KB Flash memory, 50-MHz operation, an Ethernet controller, and a wide range of peripherals. Refer to the LM3S6965 data sheet (order number DS-LM3S6965) for complete device details.
The LM3S6965 microcontroller is factory programmed with a quickstart demo program. The quickstart program resides in the LM3S6965 on-chip Flash memory and runs each time power is applied, unless the quickstart has been replaced with a user program.
= Stellaris Microcontroller LM3S6965 =


The Stellaris® LM3S6965 Evaluation Board is a compact and versatile evaluation platform for the Stellaris LM3S6965 ARM® Cortex™-M3-based microcontroller. The evaluation kit uses the LM3S6965 microcontroller’s fully integrated 10/100 Ethernet controller to demonstrate an
embedded web server.
You can use the board either as an evaluation platform or as a low-cost in-circuit debug interface(ICDI). In debug interface mode, the on-board microcontroller is bypassed, allowing programming or debugging of an external target. The kit is also compatible with high-performance external JTAG debuggers.
This evaluation kit enables quick evaluation, prototype development, and creation of applicationspecific designs for Ethernet networks. The kit also includes extensive source-code examples,allowing you to start building C code applications quickly.
= Features of the LM3S6965 Microcontroller =

 * 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture
  * 50-MHz operation
  * Hardware-division and single-cycle-multiplication
  * Integrated Nested Vectored Interrupt Controller (NVIC)
  * 42 interrupt channels with eight priority levels
 * 256 KB single-cycle Flash
 * 64 KB single-cycle SRAM
 * Four general-purpose 32-bit timers
 * Integrated Ethernet MAC and PHY
 * Three fully programmable 16C550-type UARTs
 * Four 10-bit channels (inputs) when used as single-ended inputs
 * 32-bit RISC performance using ARM® Cortex™-M3 v7M architecture
  * 50-MHz operation
  * Hardware-division and single-cycle-multiplication
  * Integrated Nested Vectored Interrupt Controller (NVIC)
  * 42 interrupt channels with eight priority levels
 * 256 KB single-cycle Flash
 * 64 KB single-cycle SRAM
 * Four general-purpose 32-bit timers
 * Integrated Ethernet MAC and PHY
 * Three fully programmable 16C550-type UARTs
 * Four 10-bit channels (inputs) when used as single-ended inputs
= Processor =

= Ethernet =

A key feature of the LM3S6965 microcontroller is its fully integrated Ethernet controller. Only a RJ45 jack with integrated magnetics and a few passive components are needed to complete the 10/100baseT interface. The RJ45 jack incorporates LEDs that indicate traffic and link status.
These are automatically managed by on-chip microcontroller hardware. Alternatively, the LEDs can be software controlled by configuring those pins as general-purpose outputs.
The LM3S6965 supports automatic MDI/MDI-X so the EVB can connect directly to a network or to another Ethernet device without requiring a cross-over cable.
= Clocking =

The LM3S6965 microcontroller has four on-chip oscillators, three are implemented on the EVB. A 8.0-MHz crystal completes the LM3S6965’s main internal clock circuit. An internal PLL, configured in software, multiples this clock to 50-MHz for core and peripheral timing.
A small, 25-MHz crystal is used by the LM3S6965 microcontroller for Ethernet physical layer timing and is independent of the main oscillator.
= Reset =

The LM3S6965 microcontroller shares its external reset input with the OLED display. In the EVB,
reset sources are gated through the CPLD, though in a typical application a simple wired-OR
arrangement is sufficient.
Reset is asserted (active low) under any one of three conditions: