Changes between Version 16 and Version 17 of TBR/BSP/LM3S6965


Ignore:
Timestamp:
Dec 17, 2011, 6:14:58 AM (8 years ago)
Author:
Ivaylo
Comment:

/* Processor */

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  • TBR/BSP/LM3S6965

    v16 v17  
    3838= Processor =
    3939
     40'''The Cortex-M3 Processor'''
     41The ARM® Cortex™-M3 processor provides a high-performance, low-cost platform that meets the system requirements of minimal memory implementation, reduced pin count, and low power consumption, while delivering outstanding computational performance and exceptional system
     42response to interrupts. Features include:
     43 *  Compact core.
     44 *  Thumb-2 instruction set, delivering the high-performance expected of an ARM core in the memory size usually associated with 8- and 16-bit devices; typically in the range of a few kilobytes of memory for microcontroller class applications.
     45 *  Rapid application execution through Harvard architecture characterized by separate buses for instruction and data.
     46 *  Exceptional interrupt handling, by implementing the register manipulations required for handling an interrupt in hardware.
     47 *  Deterministic, fast interrupt processing: always 12 cycles, or just 6 cycles with tail-chaining
     48 *  Memory protection unit (MPU) to provide a privileged mode of operation for complex applications.
     49 *  Migration from the ARM7™ processor family for better performance and power efficiency.
     50 *  Full-featured debug solution
     51  *  Serial Wire JTAG Debug Port (SWJ-DP)
     52  *  Flash Patch and Breakpoint (FPB) unit for implementing breakpoints
     53  *  Data Watchpoint and Trigger (DWT) unit for implementing watchpoints, trigger resources,and system profiling
     54  *  Instrumentation Trace Macrocell (ITM) for support of printf style debugging
     55  *  Trace Port Interface Unit (TPIU) for bridging to a Trace Port Analyzer
     56 *  Optimized for single-cycle flash usage
     57 *  Three sleep modes with clock gating for low power
     58 *  Single-cycle multiply instruction and hardware divide
     59 *  Atomic operations
     60 *  ARM Thumb2 mixed 16-/32-bit instruction set
     61 *  1.25 DMIPS/MHz
     62The Stellaris® family of microcontrollers builds on this core to bring high-performance 32-bit computing
     63to cost-sensitive embedded microcontroller applications, such as factory automation and control,
     64industrial control power devices, building and home automation, and stepper motor control.
    4065= Ethernet =
    4166