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Changes between Version 11 and Version 12 of TBR/BSP/LM3S6965


Ignore:
Timestamp:
12/17/11 06:07:05 (13 years ago)
Author:
Ivaylo
Comment:

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  • TBR/BSP/LM3S6965

    v11 v12  
    11= LM3S6965 =
    22
    3 = Overview =
    43
     4= Device Overview =
     5
     6The heart of the EVB is a Stellaris LM3S6965 ARM Cortex-M3-based microcontroller. The LM3S6965 offers 256 KB Flash memory, 50-MHz operation, an Ethernet controller, and a wide range of peripherals. Refer to the LM3S6965 data sheet (order number DS-LM3S6965) for complete device details.
     7The LM3S6965 microcontroller is factory programmed with a quickstart demo program. The quickstart program resides in the LM3S6965 on-chip Flash memory and runs each time power is applied, unless the quickstart has been replaced with a user program.
    58= Stellaris Microcontroller LM3S6965 =
    69
     
    3639= Processor =
    3740
     41= Ethernet =
    3842
    39 = Block diagram =
     43A key feature of the LM3S6965 microcontroller is its fully integrated Ethernet controller. Only a RJ45 jack with integrated magnetics and a few passive components are needed to complete the 10/100baseT interface. The RJ45 jack incorporates LEDs that indicate traffic and link status.
     44These are automatically managed by on-chip microcontroller hardware. Alternatively, the LEDs can be software controlled by configuring those pins as general-purpose outputs.
     45The LM3S6965 supports automatic MDI/MDI-X so the EVB can connect directly to a network or to another Ethernet device without requiring a cross-over cable.
     46= Clocking =
    4047
    41 [wiki:File:Diagram23.png File:Diagram23.png]
    42 =  =References==
     48The LM3S6965 microcontroller has four on-chip oscillators, three are implemented on the EVB. A
     498.0-MHz crystal completes the LM3S6965’s main internal clock circuit. An internal PLL, configured
     50in software, multiples this clock to 50-MHz for core and peripheral timing.
     51A small, 25-MHz crystal is used by the LM3S6965 microcontroller for Ethernet physical layer
     52timing and is independent of the main oscillator.
     53= Reset =
    4354
    44 
    45 http://www.ti.com/lit/ug/spmu029a/spmu029a.pdf
    46 
    47 http://www.ti.com/lit/ds/symlink/lm3s6965.pdf
     55The LM3S6965 microcontroller shares its external reset input with the OLED display. In the EVB,
     56reset sources are gated through the CPLD, though in a typical application a simple wired-OR
     57arrangement is sufficient.
     58Reset is asserted (active low) under any one of three conditions: