Changes between Version 2 and Version 3 of TBR/BSP/H8sim


Ignore:
Timestamp:
Nov 13, 2011, 6:57:38 AM (8 years ago)
Author:
JoelSherrill
Comment:

Update to add h8sxsim

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  • TBR/BSP/H8sim

    v2 v3  
    33
    44{{Infobox BSP
    5 |BSP_name     = BSP name goes here
    6 |Manufacturer = Who made me?
     5|BSP_name     = h8sim
     6|Manufacturer = FSF GNU Debugger
    77|image        =
    8 |caption      = optional image caption
    9 |Board_URL    = http:/manufacturer.com/ExampleBoard
    10 |Architecture = Architecture
    11 |CPU_model    = Model name
    12 |Monitor      = uBoot, uMon
    13 |Simulator    = Well?
     8|caption      =
     9|Board_URL    = http://www.gnu.org/s/gdb/
     10|Architecture = H8/300
     11|CPU_model    = varies
     12|Monitor      = NA
     13|Simulator    = Only
    1414|Aliases      = Any RTEMS BSP Aliases?
    15 |RAM          = XXX MB
    16 |NVMEM        = 32 MB Flash, 16 KB EEPROM
    17 |Serial       = one. UART part name.
    18 |NICs         = one. NIC part name.
    19 |Other        = anything else you need to say
     15|RAM          = configurable
     16|NVMEM        = NA
     17|Serial       = one synthetic UART
     18|NICs         = NA
     19|Other        = NA
    2020}}
    2121
    2222This BSP uses the simulator built into gdb.  That simulator does not support a clock interrupt source so is capable of running only limited tests.
    2323
    24 This BSP is now primarily used just to link H8/300 tests to demonstrate that the linker works.
     24This BSP is primarily used to test non-interrupt functionality in RTEMS and GCC.  It has the following variants:
     25
     26 *  h8sxsim
    2527= Test Reports =
    2628